A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set

We introduce a hardware acceleration technique for the parallel finite difference time domain (FDTD) method using the SSE (streaming (single instruction multiple data) SIMD extensions) instruction set. The implementation of SSE instruction set to parallel FDTD method has achieved the significant im...

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Main Authors: Dau-Chyrh Chang, Lihong Zhang, Xiaoling Yang, Shao-Hsiang Yen, Wenhua Yu
Format: Article
Language:English
Published: Wiley 2012-01-01
Series:International Journal of Antennas and Propagation
Online Access:http://dx.doi.org/10.1155/2012/851465
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author Dau-Chyrh Chang
Lihong Zhang
Xiaoling Yang
Shao-Hsiang Yen
Wenhua Yu
author_facet Dau-Chyrh Chang
Lihong Zhang
Xiaoling Yang
Shao-Hsiang Yen
Wenhua Yu
author_sort Dau-Chyrh Chang
collection DOAJ
description We introduce a hardware acceleration technique for the parallel finite difference time domain (FDTD) method using the SSE (streaming (single instruction multiple data) SIMD extensions) instruction set. The implementation of SSE instruction set to parallel FDTD method has achieved the significant improvement on the simulation performance. The benchmarks of the SSE acceleration on both the multi-CPU workstation and computer cluster have demonstrated the advantages of (vector arithmetic logic unit) VALU acceleration over GPU acceleration. Several engineering applications are employed to demonstrate the performance of parallel FDTD method enhanced by SSE instruction set.
format Article
id doaj-art-7e7afe06657541198673e9f33ce8808a
institution Kabale University
issn 1687-5869
1687-5877
language English
publishDate 2012-01-01
publisher Wiley
record_format Article
series International Journal of Antennas and Propagation
spelling doaj-art-7e7afe06657541198673e9f33ce8808a2025-02-03T01:02:38ZengWileyInternational Journal of Antennas and Propagation1687-58691687-58772012-01-01201210.1155/2012/851465851465A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction SetDau-Chyrh Chang0Lihong Zhang1Xiaoling Yang2Shao-Hsiang Yen3Wenhua Yu4Oriental Institute of Technology, Taipei 22061, TaiwanCommunication University of China, Beijing 100024, ChinaPennsylvania State University, University Park, PA 16803, USAOriental Institute of Technology, Taipei 22061, Taiwan2COMU, State College, PA 16803, USAWe introduce a hardware acceleration technique for the parallel finite difference time domain (FDTD) method using the SSE (streaming (single instruction multiple data) SIMD extensions) instruction set. The implementation of SSE instruction set to parallel FDTD method has achieved the significant improvement on the simulation performance. The benchmarks of the SSE acceleration on both the multi-CPU workstation and computer cluster have demonstrated the advantages of (vector arithmetic logic unit) VALU acceleration over GPU acceleration. Several engineering applications are employed to demonstrate the performance of parallel FDTD method enhanced by SSE instruction set.http://dx.doi.org/10.1155/2012/851465
spellingShingle Dau-Chyrh Chang
Lihong Zhang
Xiaoling Yang
Shao-Hsiang Yen
Wenhua Yu
A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set
International Journal of Antennas and Propagation
title A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set
title_full A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set
title_fullStr A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set
title_full_unstemmed A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set
title_short A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set
title_sort high performance parallel fdtd method enhanced by using sse instruction set
url http://dx.doi.org/10.1155/2012/851465
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