Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency
Whether a processor can meet the real-time requirements of a system is a crucial factor affecting the security of real-time systems. Currently, the methods for evaluating hardware real-time performance and the quality of real-time performance are not comprehensive. To address these issues, a “Hardwa...
Saved in:
Main Authors: | , , , |
---|---|
Format: | Article |
Language: | English |
Published: |
MDPI AG
2025-01-01
|
Series: | Applied Sciences |
Subjects: | |
Online Access: | https://www.mdpi.com/2076-3417/15/2/632 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
_version_ | 1832589270125117440 |
---|---|
author | Zhiwei Jin Hesong Di Tingpeng Hu Peng Wang |
author_facet | Zhiwei Jin Hesong Di Tingpeng Hu Peng Wang |
author_sort | Zhiwei Jin |
collection | DOAJ |
description | Whether a processor can meet the real-time requirements of a system is a crucial factor affecting the security of real-time systems. Currently, the methods for evaluating hardware real-time performance and the quality of real-time performance are not comprehensive. To address these issues, a “Hardware Real-Time Parameter (H<sub>rtp</sub>)” is proposed, which integrates the concepts of “whether it meets real-time system requirements”, “execution speed”, and “operational stability”. This parameter is used to evaluate the real-time performance of RISC-V processors before and after optimization. The processor is optimized for real-time performance using a “simplified local history branch predictor” and a “division data dependency module”. Experimental results show that the processor’s branch prediction accuracy and division calculation speed have both improved. When running the CoreMark benchmark program and the division test program, the test results improved, indicating an enhanced “real-time” performance of the hardware. The changes in the “Standalone Hardware Real-Time Performance Parameter (H<sub>rtp</sub>)” data are consistent with theoretical analysis, and it can meet the evaluation needs for “hardware real-time performance”. |
format | Article |
id | doaj-art-7a7a316229854954baba5e16d04bc1c7 |
institution | Kabale University |
issn | 2076-3417 |
language | English |
publishDate | 2025-01-01 |
publisher | MDPI AG |
record_format | Article |
series | Applied Sciences |
spelling | doaj-art-7a7a316229854954baba5e16d04bc1c72025-01-24T13:20:11ZengMDPI AGApplied Sciences2076-34172025-01-0115263210.3390/app15020632Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data DependencyZhiwei Jin0Hesong Di1Tingpeng Hu2Peng Wang3Institute of Science and Technology Innovation, Civil Aviation University of China, Tianjin 300300, ChinaSchool of Safety Science and Engineering, Civil Aviation University of China, Tianjin 300300, ChinaSchool of Electronic Information and Automation, Civil Aviation University of China, Tianjin 300300, ChinaInstitute of Science and Technology Innovation, Civil Aviation University of China, Tianjin 300300, ChinaWhether a processor can meet the real-time requirements of a system is a crucial factor affecting the security of real-time systems. Currently, the methods for evaluating hardware real-time performance and the quality of real-time performance are not comprehensive. To address these issues, a “Hardware Real-Time Parameter (H<sub>rtp</sub>)” is proposed, which integrates the concepts of “whether it meets real-time system requirements”, “execution speed”, and “operational stability”. This parameter is used to evaluate the real-time performance of RISC-V processors before and after optimization. The processor is optimized for real-time performance using a “simplified local history branch predictor” and a “division data dependency module”. Experimental results show that the processor’s branch prediction accuracy and division calculation speed have both improved. When running the CoreMark benchmark program and the division test program, the test results improved, indicating an enhanced “real-time” performance of the hardware. The changes in the “Standalone Hardware Real-Time Performance Parameter (H<sub>rtp</sub>)” data are consistent with theoretical analysis, and it can meet the evaluation needs for “hardware real-time performance”.https://www.mdpi.com/2076-3417/15/2/632RISC-Vprocessorhardwarereal-time optimizationbranch predictiondivider |
spellingShingle | Zhiwei Jin Hesong Di Tingpeng Hu Peng Wang Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency Applied Sciences RISC-V processor hardware real-time optimization branch prediction divider |
title | Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency |
title_full | Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency |
title_fullStr | Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency |
title_full_unstemmed | Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency |
title_short | Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency |
title_sort | real time optimization of risc v processors based on branch prediction and division data dependency |
topic | RISC-V processor hardware real-time optimization branch prediction divider |
url | https://www.mdpi.com/2076-3417/15/2/632 |
work_keys_str_mv | AT zhiweijin realtimeoptimizationofriscvprocessorsbasedonbranchpredictionanddivisiondatadependency AT hesongdi realtimeoptimizationofriscvprocessorsbasedonbranchpredictionanddivisiondatadependency AT tingpenghu realtimeoptimizationofriscvprocessorsbasedonbranchpredictionanddivisiondatadependency AT pengwang realtimeoptimizationofriscvprocessorsbasedonbranchpredictionanddivisiondatadependency |