A Small-Area 2nd-Order Adder-Less Continuous-Time ΔΣ Modulator With Pulse Shaping FIR DAC for Magnetic Sensing

This work presents a small-area 2nd-order continuous-time <inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> Modulator (CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math&...

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Bibliographic Details
Main Authors: Manish Srivastava, Alessandro Ferro, Aleksandr Sidun, Jose M. De La Rosa, Kilian O'Donoghue, Padraig Cantillon-Murphy, Daniel O'Hare
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Open Journal of Circuits and Systems
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Online Access:https://ieeexplore.ieee.org/document/10475189/
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Summary:This work presents a small-area 2nd-order continuous-time <inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> Modulator (CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula>) with a single low dropout regulator (LDO) serving as both the power supply for the CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> and reference voltage buffer. The CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> is used for digitising very low amplitude signals in applications such as magnetic tracking for image-guided and robotic surgery. A cascade of integrators in a feed-forward architecture implemented with an adder-less architecture has been proposed to minimise the silicon area. In addition, a novel continuous-time pulse-shaped digital-to-analog converter (CT-PS DAC) is proposed for excess loop delay (ELD) compensation to simplify the current drive requirements of the reference voltage buffer. This enables a single low-dropout (LDO) voltage regulator to generate both power supply and <inline-formula> <tex-math notation="LaTeX">$\text{V}_{ref}$ </tex-math></inline-formula> for the DAC. The circuit has been designed in 65-nm CMOS technology, achieving a peak 82-dB SNDR and 91-dB DR within a signal bandwidth of 20 kHz and the CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> consumes <inline-formula> <tex-math notation="LaTeX">$300 ~\mu \text{W}$ </tex-math></inline-formula> of power when clocked at 10.24 MHz. The CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> achieves a state-of-the-art area of 0.07 mm2.
ISSN:2644-1225