Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems
The design space of FPGA-based processor systems is huge, because many parameters can be modified at design- and runtime to achieve an efficient system solution in terms of performance, power and energy consumption. Such parameters are, for example, the number of processors and their configurations,...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2011-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2011/985931 |
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| _version_ | 1832555993434685440 |
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| author | Diana Göhringer Jonathan Obie André L. S. Braga Michael Hübner Carlos H. Llanos Jürgen Becker |
| author_facet | Diana Göhringer Jonathan Obie André L. S. Braga Michael Hübner Carlos H. Llanos Jürgen Becker |
| author_sort | Diana Göhringer |
| collection | DOAJ |
| description | The design space of FPGA-based processor systems is huge, because many parameters can be modified at design- and runtime to achieve an efficient system solution in terms of performance, power and energy consumption. Such parameters are, for example, the number of processors and their configurations, the clock frequencies at design time, the use of dynamic frequency scaling at runtime, the application task distribution, and the FPGA type and size. The major contribution of this paper is the exploration of all these parameters and their impact on performance, power dissipation, and energy consumption for four different application scenarios. The goal is to introduce a first approach for a developer's guideline, supporting the choice of an optimized and specific system parameterization for a target application on FPGA-based multiprocessor systems-on-chip. The FPGAs used for these explorations were Xilinx Virtex-4 and Xilinx Virtex-5. The performance results were measured on the FPGA while the power consumption was estimated using the Xilinx XPower Analyzer tool. Finally, a novel runtime adaptive multiprocessor architecture for dynamic clock frequency scaling is introduced and used for the performance, power and energy consumption evaluations. |
| format | Article |
| id | doaj-art-6c62a62219694f40b3f084a1dba075b6 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2011-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-6c62a62219694f40b3f084a1dba075b62025-02-03T05:46:35ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092011-01-01201110.1155/2011/985931985931Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor SystemsDiana Göhringer0Jonathan Obie1André L. S. Braga2Michael Hübner3Carlos H. Llanos4Jürgen Becker5Object Recognition Department, Fraunhofer IOSB, 76275 Ettlingen, GermanyObject Recognition Department, Fraunhofer IOSB, 76275 Ettlingen, GermanyDepartment of Mechanical Engineering, University of Brasilia (UnB), 70910-900 Brasilia, DF, BrazilITIV, Karlsruhe Institute of Technology (KIT), 76128 Karlsruhe, GermanyDepartment of Mechanical Engineering, University of Brasilia (UnB), 70910-900 Brasilia, DF, BrazilITIV, Karlsruhe Institute of Technology (KIT), 76128 Karlsruhe, GermanyThe design space of FPGA-based processor systems is huge, because many parameters can be modified at design- and runtime to achieve an efficient system solution in terms of performance, power and energy consumption. Such parameters are, for example, the number of processors and their configurations, the clock frequencies at design time, the use of dynamic frequency scaling at runtime, the application task distribution, and the FPGA type and size. The major contribution of this paper is the exploration of all these parameters and their impact on performance, power dissipation, and energy consumption for four different application scenarios. The goal is to introduce a first approach for a developer's guideline, supporting the choice of an optimized and specific system parameterization for a target application on FPGA-based multiprocessor systems-on-chip. The FPGAs used for these explorations were Xilinx Virtex-4 and Xilinx Virtex-5. The performance results were measured on the FPGA while the power consumption was estimated using the Xilinx XPower Analyzer tool. Finally, a novel runtime adaptive multiprocessor architecture for dynamic clock frequency scaling is introduced and used for the performance, power and energy consumption evaluations.http://dx.doi.org/10.1155/2011/985931 |
| spellingShingle | Diana Göhringer Jonathan Obie André L. S. Braga Michael Hübner Carlos H. Llanos Jürgen Becker Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems International Journal of Reconfigurable Computing |
| title | Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems |
| title_full | Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems |
| title_fullStr | Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems |
| title_full_unstemmed | Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems |
| title_short | Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems |
| title_sort | exploration of the power performance tradeoff through parameterization of fpga based multiprocessor systems |
| url | http://dx.doi.org/10.1155/2011/985931 |
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