E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation

In this article, we introduce a novel technique called E-multiplication and accumulation (MAC) (EMAC), aimed at enhancing energy efficiency, reducing latency, and improving the accuracy of analog-based in-static random access memory (SRAM) MAC accelerators. Our approach involves a digital-to-time wo...

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Main Authors: Saeed Seyedfaraji, Salar Shakibhamedan, Amire Seyedfaraji, Baset Mesgari, Nima Taherinejad, Axel Jantsch, Semeen Rehman
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
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Online Access:https://ieeexplore.ieee.org/document/10804123/
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author Saeed Seyedfaraji
Salar Shakibhamedan
Amire Seyedfaraji
Baset Mesgari
Nima Taherinejad
Axel Jantsch
Semeen Rehman
author_facet Saeed Seyedfaraji
Salar Shakibhamedan
Amire Seyedfaraji
Baset Mesgari
Nima Taherinejad
Axel Jantsch
Semeen Rehman
author_sort Saeed Seyedfaraji
collection DOAJ
description In this article, we introduce a novel technique called E-multiplication and accumulation (MAC) (EMAC), aimed at enhancing energy efficiency, reducing latency, and improving the accuracy of analog-based in-static random access memory (SRAM) MAC accelerators. Our approach involves a digital-to-time word-line (WL) modulation technique that encodes the WL voltage while preserving the necessary linear voltage drop for precise computations. This eliminates the need for an additional digital-to-analog converter (DAC) in the design. Furthermore, the SRAM-based logical weight encoding scheme we present reduces the reliance on capacitance-based techniques, which typically introduce area overhead in the circuit. This approach ensures consistent voltage drops for all equivalent cases [i.e., <inline-formula> <tex-math notation="LaTeX">$(a { \times} b) = (b \times a)$ </tex-math></inline-formula>], addressing a persistent issue in existing state-of-the-art methods. Compared with state-of-the-art analog-based in-SRAM techniques, our E-MAC approach demonstrates significant energy savings (<inline-formula> <tex-math notation="LaTeX">$1.89\times $ </tex-math></inline-formula>) and improved accuracy (73.25%) per MAC computation from a 1-V power supply, while achieving a <inline-formula> <tex-math notation="LaTeX">$11.84\times $ </tex-math></inline-formula> energy efficiency improvement over baseline digital approaches. Our application analysis shows a marginal overall reduction in accuracy, i.e., a 0.1% and 0.17% reduction for LeNet5-based CNN and VGG16, respectively, when trained on the MNIST and ImageNet datasets.
format Article
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institution Kabale University
issn 2329-9231
language English
publishDate 2024-01-01
publisher IEEE
record_format Article
series IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
spelling doaj-art-628a643239e948d5987f214ebc6a979f2025-01-24T00:02:11ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312024-01-011017818610.1109/JXCDC.2024.351863310804123E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time ModulationSaeed Seyedfaraji0https://orcid.org/0000-0003-0085-6282Salar Shakibhamedan1https://orcid.org/0000-0003-2862-2859Amire Seyedfaraji2https://orcid.org/0000-0002-7047-9454Baset Mesgari3https://orcid.org/0000-0002-2109-8348Nima Taherinejad4https://orcid.org/0000-0002-1295-0332Axel Jantsch5https://orcid.org/0000-0003-2251-0004Semeen Rehman6Technische Universit&#x00E4;t Wien (TU Wien), Vienna, AustriaTechnische Universit&#x00E4;t Wien (TU Wien), Vienna, AustriaDepartment of Electrical Engineering, Faculty of Engineering, Alzahra University, Tehran, IranTechnische Universit&#x00E4;t Wien (TU Wien), Vienna, AustriaTechnische Universit&#x00E4;t Wien (TU Wien), Vienna, AustriaTechnische Universit&#x00E4;t Wien (TU Wien), Vienna, AustriaInstitute of Parallel Computing Systems, Computer Science, University of Amsterdam, Amsterdam, The NetherlandsIn this article, we introduce a novel technique called E-multiplication and accumulation (MAC) (EMAC), aimed at enhancing energy efficiency, reducing latency, and improving the accuracy of analog-based in-static random access memory (SRAM) MAC accelerators. Our approach involves a digital-to-time word-line (WL) modulation technique that encodes the WL voltage while preserving the necessary linear voltage drop for precise computations. This eliminates the need for an additional digital-to-analog converter (DAC) in the design. Furthermore, the SRAM-based logical weight encoding scheme we present reduces the reliance on capacitance-based techniques, which typically introduce area overhead in the circuit. This approach ensures consistent voltage drops for all equivalent cases [i.e., <inline-formula> <tex-math notation="LaTeX">$(a { \times} b) = (b \times a)$ </tex-math></inline-formula>], addressing a persistent issue in existing state-of-the-art methods. Compared with state-of-the-art analog-based in-SRAM techniques, our E-MAC approach demonstrates significant energy savings (<inline-formula> <tex-math notation="LaTeX">$1.89\times $ </tex-math></inline-formula>) and improved accuracy (73.25%) per MAC computation from a 1-V power supply, while achieving a <inline-formula> <tex-math notation="LaTeX">$11.84\times $ </tex-math></inline-formula> energy efficiency improvement over baseline digital approaches. Our application analysis shows a marginal overall reduction in accuracy, i.e., a 0.1% and 0.17% reduction for LeNet5-based CNN and VGG16, respectively, when trained on the MNIST and ImageNet datasets.https://ieeexplore.ieee.org/document/10804123/6T-static random access memory (SRAM)convolutional neural network (CNN)image classificationprocessing in memory (PIM)
spellingShingle Saeed Seyedfaraji
Salar Shakibhamedan
Amire Seyedfaraji
Baset Mesgari
Nima Taherinejad
Axel Jantsch
Semeen Rehman
E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
6T-static random access memory (SRAM)
convolutional neural network (CNN)
image classification
processing in memory (PIM)
title E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation
title_full E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation
title_fullStr E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation
title_full_unstemmed E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation
title_short E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation
title_sort e mac enhanced in sram mac accuracy via digital to time modulation
topic 6T-static random access memory (SRAM)
convolutional neural network (CNN)
image classification
processing in memory (PIM)
url https://ieeexplore.ieee.org/document/10804123/
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AT salarshakibhamedan emacenhancedinsrammacaccuracyviadigitaltotimemodulation
AT amireseyedfaraji emacenhancedinsrammacaccuracyviadigitaltotimemodulation
AT basetmesgari emacenhancedinsrammacaccuracyviadigitaltotimemodulation
AT nimataherinejad emacenhancedinsrammacaccuracyviadigitaltotimemodulation
AT axeljantsch emacenhancedinsrammacaccuracyviadigitaltotimemodulation
AT semeenrehman emacenhancedinsrammacaccuracyviadigitaltotimemodulation