Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications
In modern ICs, sub-threshold voltage management plays a significant role due to its perspective on energy efficiency and speed performance. Level shifters (LSs) play a critical role in signal exchange among multiple voltage domains by ensuring signal integrity and the reliable operation of ICs. In t...
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MDPI AG
2025-01-01
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| Series: | Micromachines |
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| Online Access: | https://www.mdpi.com/2072-666X/16/1/64 |
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| author | Chakali Chandrasekhar Mohammed Mahaboob Basha Sari Mohan Das Oruganti Hemakesavulu Mohan Dholvan Javed Syed |
| author_facet | Chakali Chandrasekhar Mohammed Mahaboob Basha Sari Mohan Das Oruganti Hemakesavulu Mohan Dholvan Javed Syed |
| author_sort | Chakali Chandrasekhar |
| collection | DOAJ |
| description | In modern ICs, sub-threshold voltage management plays a significant role due to its perspective on energy efficiency and speed performance. Level shifters (LSs) play a critical role in signal exchange among multiple voltage domains by ensuring signal integrity and the reliable operation of ICs. In this article, a Pass-Transistor-Enabled Split Input Voltage Level Shifter (PVLS) is designed for area, delay, and power-efficient applications with a wide voltage conversion range. The represented low-power LS structure is a general blend of both pull-up and pull-down networks that perform level-up or level-down shifts. The proposed PVLS is incorporated with the multi-threshold CMOS technique and a load-balancing driving split inverter to limit high static current, leakage power, and performance degradation. The schematic structure could be able to convert voltages from low to high as well as high to low. The architecture design has the lowest silicon area. The implementation of the proposed design was taken under 55 nm CMOS technology. The represented LS could be able to convert voltage ranges between 0.3 V and 1.3 V, which has a dynamic power of 2.00 nW. The overall propagation delay of the LS is 90 ps and an area of 7.66 µm<sup>2</sup> for an input frequency of 1 MHz. |
| format | Article |
| id | doaj-art-626800c376a64f5587f601392556e9d7 |
| institution | Kabale University |
| issn | 2072-666X |
| language | English |
| publishDate | 2025-01-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Micromachines |
| spelling | doaj-art-626800c376a64f5587f601392556e9d72025-01-24T13:42:00ZengMDPI AGMicromachines2072-666X2025-01-011616410.3390/mi16010064Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power ApplicationsChakali Chandrasekhar0Mohammed Mahaboob Basha1Sari Mohan Das2Oruganti Hemakesavulu3Mohan Dholvan4Javed Syed5Department of ECE, Sri Venkateswara College of Engineering, Tirupati 517507, AP, IndiaDepartment of ECE, Sreenidhi Institute of Science and Technology (Autonomous), Hyderabad 501301, TG, IndiaDepartment of ECE, SVR Engineering College, Nandyal 518501, AP, IndiaDepartment of EEE, Annamacharya University, Rajampet 516126, AP, IndiaDepartment of ECE, Sreenidhi Institute of Science and Technology (Autonomous), Hyderabad 501301, TG, IndiaDepartment of Mechanical Engineering, College of Engineering, King Khalid University, Abha 61421, Saudi ArabiaIn modern ICs, sub-threshold voltage management plays a significant role due to its perspective on energy efficiency and speed performance. Level shifters (LSs) play a critical role in signal exchange among multiple voltage domains by ensuring signal integrity and the reliable operation of ICs. In this article, a Pass-Transistor-Enabled Split Input Voltage Level Shifter (PVLS) is designed for area, delay, and power-efficient applications with a wide voltage conversion range. The represented low-power LS structure is a general blend of both pull-up and pull-down networks that perform level-up or level-down shifts. The proposed PVLS is incorporated with the multi-threshold CMOS technique and a load-balancing driving split inverter to limit high static current, leakage power, and performance degradation. The schematic structure could be able to convert voltages from low to high as well as high to low. The architecture design has the lowest silicon area. The implementation of the proposed design was taken under 55 nm CMOS technology. The represented LS could be able to convert voltage ranges between 0.3 V and 1.3 V, which has a dynamic power of 2.00 nW. The overall propagation delay of the LS is 90 ps and an area of 7.66 µm<sup>2</sup> for an input frequency of 1 MHz.https://www.mdpi.com/2072-666X/16/1/64low threshold voltagepower-efficientsub-threshold operationmulti-threshold CMOSIoT applications |
| spellingShingle | Chakali Chandrasekhar Mohammed Mahaboob Basha Sari Mohan Das Oruganti Hemakesavulu Mohan Dholvan Javed Syed Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications Micromachines low threshold voltage power-efficient sub-threshold operation multi-threshold CMOS IoT applications |
| title | Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications |
| title_full | Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications |
| title_fullStr | Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications |
| title_full_unstemmed | Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications |
| title_short | Pass-Transistor-Enabled Split Input Voltage Level Shifter for Ultra-Low-Power Applications |
| title_sort | pass transistor enabled split input voltage level shifter for ultra low power applications |
| topic | low threshold voltage power-efficient sub-threshold operation multi-threshold CMOS IoT applications |
| url | https://www.mdpi.com/2072-666X/16/1/64 |
| work_keys_str_mv | AT chakalichandrasekhar passtransistorenabledsplitinputvoltagelevelshifterforultralowpowerapplications AT mohammedmahaboobbasha passtransistorenabledsplitinputvoltagelevelshifterforultralowpowerapplications AT sarimohandas passtransistorenabledsplitinputvoltagelevelshifterforultralowpowerapplications AT orugantihemakesavulu passtransistorenabledsplitinputvoltagelevelshifterforultralowpowerapplications AT mohandholvan passtransistorenabledsplitinputvoltagelevelshifterforultralowpowerapplications AT javedsyed passtransistorenabledsplitinputvoltagelevelshifterforultralowpowerapplications |