Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA
A variety of platforms, such as micro-unmanned vehicles, are limited in the amount of computational hardware they can support due to weight and power constraints. An efficient stereo vision algorithm implemented on an FPGA would be able to minimize payload and power consumption in microunmanned vehi...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2014-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2014/945926 |
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| _version_ | 1832554086757564416 |
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| author | Beau Tippetts Dah Jye Lee Kirt Lillywhite James K. Archibald |
| author_facet | Beau Tippetts Dah Jye Lee Kirt Lillywhite James K. Archibald |
| author_sort | Beau Tippetts |
| collection | DOAJ |
| description | A variety of platforms, such as micro-unmanned vehicles, are limited in the amount of computational hardware they can support due to weight and power constraints. An efficient stereo vision algorithm implemented on an FPGA would be able to minimize payload and power consumption in microunmanned vehicles, while providing 3D information and still leaving computational resources available for other processing tasks. This work presents a hardware design of the efficient profile shape matching stereo vision algorithm. Hardware resource usage is presented for the targeted micro-UV platform, Helio-copter, that uses the Xilinx Virtex 4 FX60 FPGA. Less than a fifth of the resources on this FGPA were used to produce dense disparity maps for image sizes up to 450 × 375, with the ability to scale up easily by increasing BRAM usage. A comparison is given of accuracy, speed performance, and resource usage of a census transform-based stereo vision FPGA implementation by Jin et al. Results show that the profile shape matching algorithm is an efficient real-time stereo vision algorithm for hardware implementation for resource limited systems such as microunmanned vehicles. |
| format | Article |
| id | doaj-art-6256243f22d8468e81e02c4e50116164 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2014-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-6256243f22d8468e81e02c4e501161642025-02-03T05:52:19ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092014-01-01201410.1155/2014/945926945926Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGABeau Tippetts0Dah Jye Lee1Kirt Lillywhite2James K. Archibald3Department of Computer Engineering, Brigham Young University, Provo, UT 84602, USADepartment of Computer Engineering, Brigham Young University, Provo, UT 84602, USADepartment of Computer Engineering, Brigham Young University, Provo, UT 84602, USADepartment of Computer Engineering, Brigham Young University, Provo, UT 84602, USAA variety of platforms, such as micro-unmanned vehicles, are limited in the amount of computational hardware they can support due to weight and power constraints. An efficient stereo vision algorithm implemented on an FPGA would be able to minimize payload and power consumption in microunmanned vehicles, while providing 3D information and still leaving computational resources available for other processing tasks. This work presents a hardware design of the efficient profile shape matching stereo vision algorithm. Hardware resource usage is presented for the targeted micro-UV platform, Helio-copter, that uses the Xilinx Virtex 4 FX60 FPGA. Less than a fifth of the resources on this FGPA were used to produce dense disparity maps for image sizes up to 450 × 375, with the ability to scale up easily by increasing BRAM usage. A comparison is given of accuracy, speed performance, and resource usage of a census transform-based stereo vision FPGA implementation by Jin et al. Results show that the profile shape matching algorithm is an efficient real-time stereo vision algorithm for hardware implementation for resource limited systems such as microunmanned vehicles.http://dx.doi.org/10.1155/2014/945926 |
| spellingShingle | Beau Tippetts Dah Jye Lee Kirt Lillywhite James K. Archibald Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA International Journal of Reconfigurable Computing |
| title | Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA |
| title_full | Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA |
| title_fullStr | Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA |
| title_full_unstemmed | Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA |
| title_short | Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA |
| title_sort | hardware efficient design of real time profile shape matching stereo vision algorithm on fpga |
| url | http://dx.doi.org/10.1155/2014/945926 |
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