A Workload-Adaptive and Reconfigurable Bus Architecture for Multicore Processors
Interconnection networks for multicore processors are traditionally designed to serve a diversity of workloads. However, different workloads or even different execution phases of the same workload may benefit from different interconnect configurations. In this paper, we first motivate the need for w...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2010-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2010/205852 |
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