DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer

System on Wafer (SoW) based on chiplets may be implanted with hardware Trojans (HTs) by untrustworthy third-party chiplet vendors. However, traditional HTs protection techniques cannot guarantee complete protection against HTs, which poses a great challenge to the hardware security of SoW. In this p...

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Main Authors: Bo Mei, Zhengbin Zhu, Peijie Li, Bo Zhao
Format: Article
Language:English
Published: Wiley 2024-01-01
Series:IET Information Security
Online Access:http://dx.doi.org/10.1049/2024/2023349
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author Bo Mei
Zhengbin Zhu
Peijie Li
Bo Zhao
author_facet Bo Mei
Zhengbin Zhu
Peijie Li
Bo Zhao
author_sort Bo Mei
collection DOAJ
description System on Wafer (SoW) based on chiplets may be implanted with hardware Trojans (HTs) by untrustworthy third-party chiplet vendors. However, traditional HTs protection techniques cannot guarantee complete protection against HTs, which poses a great challenge to the hardware security of SoW. In this paper, we propose a computing architecture based on endogenous security theory—dynamic heterogeneous redundant computing architecture (DHRCA) that can tolerate and detect HTs at runtime. The security of our approach is analyzed by building a generalized stochastic coloring petri net (GSCPN) model of DHRCA. The simulation results based on the GSCPN model show that our method can improve the system security probability to 0.8690 and the system availability probability to 0.9750 in the steady state compared with typical triple-mode redundancy and runtime monitoring methods. Furthermore, the impact of different attack and defense strategies on system security of different methods is simulated and analyzed in this paper.
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institution Kabale University
issn 1751-8717
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publishDate 2024-01-01
publisher Wiley
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series IET Information Security
spelling doaj-art-5442776c04804600be20d2557c3fa2252025-02-03T01:29:25ZengWileyIET Information Security1751-87172024-01-01202410.1049/2024/2023349DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on WaferBo Mei0Zhengbin Zhu1Peijie Li2Bo Zhao3PLA Information Engineering UniversityPLA Information Engineering UniversityPLA Information Engineering UniversityPLA Information Engineering UniversitySystem on Wafer (SoW) based on chiplets may be implanted with hardware Trojans (HTs) by untrustworthy third-party chiplet vendors. However, traditional HTs protection techniques cannot guarantee complete protection against HTs, which poses a great challenge to the hardware security of SoW. In this paper, we propose a computing architecture based on endogenous security theory—dynamic heterogeneous redundant computing architecture (DHRCA) that can tolerate and detect HTs at runtime. The security of our approach is analyzed by building a generalized stochastic coloring petri net (GSCPN) model of DHRCA. The simulation results based on the GSCPN model show that our method can improve the system security probability to 0.8690 and the system availability probability to 0.9750 in the steady state compared with typical triple-mode redundancy and runtime monitoring methods. Furthermore, the impact of different attack and defense strategies on system security of different methods is simulated and analyzed in this paper.http://dx.doi.org/10.1049/2024/2023349
spellingShingle Bo Mei
Zhengbin Zhu
Peijie Li
Bo Zhao
DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer
IET Information Security
title DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer
title_full DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer
title_fullStr DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer
title_full_unstemmed DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer
title_short DHRCA: A Design of Security Architecture Based on Dynamic Heterogeneous Redundant for System on Wafer
title_sort dhrca a design of security architecture based on dynamic heterogeneous redundant for system on wafer
url http://dx.doi.org/10.1049/2024/2023349
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AT peijieli dhrcaadesignofsecurityarchitecturebasedondynamicheterogeneousredundantforsystemonwafer
AT bozhao dhrcaadesignofsecurityarchitecturebasedondynamicheterogeneousredundantforsystemonwafer