FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator

FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator

This paper presents an efficient all digital carrier recovery loop (ADCRL) for quadrature phase shift keying (QPSK). The ADCRL combines classic closed-loop carrier recovery circuit, all digital Costas loop (ADCOL), with frequency feedward loop, maximum likelihood frequency estimator (MLFE) so as to...

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Bibliographic Details
Main Authors: Kaiyu Wang, Zhiming Song, Xianwei Qi, Qingxin Yan, Zhenan Tang
Format: Article
Language:English
Published: Wiley 2014-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2014/502942
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