FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator
This paper presents an efficient all digital carrier recovery loop (ADCRL) for quadrature phase shift keying (QPSK). The ADCRL combines classic closed-loop carrier recovery circuit, all digital Costas loop (ADCOL), with frequency feedward loop, maximum likelihood frequency estimator (MLFE) so as to...
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| Format: | Article |
| Language: | English |
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Wiley
2014-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2014/502942 |
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| author | Kaiyu Wang Zhiming Song Xianwei Qi Qingxin Yan Zhenan Tang |
| author_facet | Kaiyu Wang Zhiming Song Xianwei Qi Qingxin Yan Zhenan Tang |
| author_sort | Kaiyu Wang |
| collection | DOAJ |
| description | This paper presents an efficient all digital carrier recovery loop (ADCRL) for quadrature phase shift keying (QPSK). The ADCRL combines classic closed-loop carrier recovery circuit, all digital Costas loop (ADCOL), with frequency feedward loop, maximum likelihood frequency estimator (MLFE) so as to make the best use of the advantages of the two types of carrier recovery loops and obtain a more robust performance in the procedure of carrier recovery. Besides, considering that, for MLFE, the accurate estimation of frequency offset is associated with the linear characteristic of its frequency discriminator (FD), the Coordinate Rotation Digital Computer (CORDIC) algorithm is introduced into the FD based on MLFE to unwrap linearly phase difference. The frequency offset contained within the phase difference unwrapped is estimated by the MLFE implemented just using some shifter and multiply-accumulate units to assist the ADCOL to lock quickly and precisely. The joint simulation results of ModelSim and MATLAB show that the performances of the proposed ADCRL in locked-in time and range are superior to those of the ADCOL. On the other hand, a systematic design procedure based on FPGA for the proposed ADCRL is also presented. |
| format | Article |
| id | doaj-art-534cc03da90449219b47a5c016f473da |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2014-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-534cc03da90449219b47a5c016f473da2025-02-03T05:45:06ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092014-01-01201410.1155/2014/502942502942FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency EstimatorKaiyu Wang0Zhiming Song1Xianwei Qi2Qingxin Yan3Zhenan Tang4Dalian Institute of Semiconductor Technology and School of Electronic Science and Technology, Dalian University of Technology, Dalian 116023, ChinaDalian Institute of Semiconductor Technology and School of Electronic Science and Technology, Dalian University of Technology, Dalian 116023, ChinaDalian Institute of Semiconductor Technology and School of Electronic Science and Technology, Dalian University of Technology, Dalian 116023, ChinaDalian Institute of Semiconductor Technology and School of Electronic Science and Technology, Dalian University of Technology, Dalian 116023, ChinaDalian Institute of Semiconductor Technology and School of Electronic Science and Technology, Dalian University of Technology, Dalian 116023, ChinaThis paper presents an efficient all digital carrier recovery loop (ADCRL) for quadrature phase shift keying (QPSK). The ADCRL combines classic closed-loop carrier recovery circuit, all digital Costas loop (ADCOL), with frequency feedward loop, maximum likelihood frequency estimator (MLFE) so as to make the best use of the advantages of the two types of carrier recovery loops and obtain a more robust performance in the procedure of carrier recovery. Besides, considering that, for MLFE, the accurate estimation of frequency offset is associated with the linear characteristic of its frequency discriminator (FD), the Coordinate Rotation Digital Computer (CORDIC) algorithm is introduced into the FD based on MLFE to unwrap linearly phase difference. The frequency offset contained within the phase difference unwrapped is estimated by the MLFE implemented just using some shifter and multiply-accumulate units to assist the ADCOL to lock quickly and precisely. The joint simulation results of ModelSim and MATLAB show that the performances of the proposed ADCRL in locked-in time and range are superior to those of the ADCOL. On the other hand, a systematic design procedure based on FPGA for the proposed ADCRL is also presented.http://dx.doi.org/10.1155/2014/502942 |
| spellingShingle | Kaiyu Wang Zhiming Song Xianwei Qi Qingxin Yan Zhenan Tang FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator International Journal of Reconfigurable Computing |
| title | FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator |
| title_full | FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator |
| title_fullStr | FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator |
| title_full_unstemmed | FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator |
| title_short | FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator |
| title_sort | fpga based implementation of all digital qpsk carrier recovery loop combining costas loop and maximum likelihood frequency estimator |
| url | http://dx.doi.org/10.1155/2014/502942 |
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