DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices
Energy-efficient memory design has become increasingly critical with the proliferation of IoT devices. Although hybrid architectures, which combine multiple memory technologies, are widely used, we show that unified emerging Non-Volatile Memory (eNVM) systems can achieve superior efficiency when dri...
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| Format: | Article |
| Language: | English |
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IEEE
2025-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10844295/ |
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| author | Belal Jahannia Abdolah Amirany Elham Heidari Hamed Dalir |
| author_facet | Belal Jahannia Abdolah Amirany Elham Heidari Hamed Dalir |
| author_sort | Belal Jahannia |
| collection | DOAJ |
| description | Energy-efficient memory design has become increasingly critical with the proliferation of IoT devices. Although hybrid architectures, which combine multiple memory technologies, are widely used, we show that unified emerging Non-Volatile Memory (eNVM) systems can achieve superior efficiency when driven at their optimal frequencies. This paper describes Data Lifetime Aware Memory Energy-efficient Design (DaLAMED), a technology-agnostic methodology to optimize memory system energy efficiency by considering application-specific data lifetime patterns along with operating frequencies. DaLAMED analyzes memory access patterns to determine the most energy-efficient memory technology for a given clock frequency or the critical frequency points at which energy efficiency advantages change between technologies. Through a thorough analysis using the MiBench benchmark suite, we determined that unified eNVM architectures, when optimized with DaLAMED, can reduce energy consumption by 30-60% compared to hybrid memory designs featuring DRAM at frequencies below 30 MHz, and offer comparable benefits over hybrid memory structures containing SRAM at frequencies up to 125 MHz. These results contradict many of the prevailing assumptions about hybrid memory architectures and also provide a platform for optimization of memory systems with or without new emerging memory technologies. |
| format | Article |
| id | doaj-art-534680dd9626448fb02360cd3cd68ab6 |
| institution | Kabale University |
| issn | 2169-3536 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-534680dd9626448fb02360cd3cd68ab62025-01-31T23:04:46ZengIEEEIEEE Access2169-35362025-01-0113198981990810.1109/ACCESS.2025.353133810844295DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge DevicesBelal Jahannia0https://orcid.org/0009-0009-7924-3366Abdolah Amirany1https://orcid.org/0000-0003-0298-6945Elham Heidari2Hamed Dalir3Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USAThe George Washington University, Washington, DC, USADepartment of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USADepartment of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USAEnergy-efficient memory design has become increasingly critical with the proliferation of IoT devices. Although hybrid architectures, which combine multiple memory technologies, are widely used, we show that unified emerging Non-Volatile Memory (eNVM) systems can achieve superior efficiency when driven at their optimal frequencies. This paper describes Data Lifetime Aware Memory Energy-efficient Design (DaLAMED), a technology-agnostic methodology to optimize memory system energy efficiency by considering application-specific data lifetime patterns along with operating frequencies. DaLAMED analyzes memory access patterns to determine the most energy-efficient memory technology for a given clock frequency or the critical frequency points at which energy efficiency advantages change between technologies. Through a thorough analysis using the MiBench benchmark suite, we determined that unified eNVM architectures, when optimized with DaLAMED, can reduce energy consumption by 30-60% compared to hybrid memory designs featuring DRAM at frequencies below 30 MHz, and offer comparable benefits over hybrid memory structures containing SRAM at frequencies up to 125 MHz. These results contradict many of the prevailing assumptions about hybrid memory architectures and also provide a platform for optimization of memory systems with or without new emerging memory technologies.https://ieeexplore.ieee.org/document/10844295/Emerging non-volatile memorySTT-MRAMPCMRRAMFeRAMIoT |
| spellingShingle | Belal Jahannia Abdolah Amirany Elham Heidari Hamed Dalir DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices IEEE Access Emerging non-volatile memory STT-MRAM PCM RRAM FeRAM IoT |
| title | DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices |
| title_full | DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices |
| title_fullStr | DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices |
| title_full_unstemmed | DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices |
| title_short | DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices |
| title_sort | dalamed a clock frequency and data lifetime aware methodology for energy efficient memory design in edge devices |
| topic | Emerging non-volatile memory STT-MRAM PCM RRAM FeRAM IoT |
| url | https://ieeexplore.ieee.org/document/10844295/ |
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