Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application
We propose an FPGA design for the relevancy computation part of a high-throughput real-time search application. The application matches terms in a stream of documents against a static profile, held in off-chip memory. We present a mathematical analysis of the throughput of the application and apply...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2012-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2012/507173 |
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