Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training - Bolin Zhang; Yu Liu; Tianqi Gao; Jialiang Yin; Zhenyu Guan; Deming Zhang; Lang Zeng (Micromachines)
A Probabilistic Bit (P-Bit) device serves as the core hardware for implementing Ising computation. However, the severe intrinsic variations of stochastic P-Bit devices hinder the large-scale expansion of the P-Bit array, significantly limiting the practical usage of Ising computation. In this work, a behavioral model which attributes P-Bit variations to two parameters, <semantics>α</semantics> and <semantics>ΔV</semantics>, is proposed. Then the weight compensation method is introduced, which can mitigate <semantics>α</semantics> and <semantics>ΔV</semantics> of P-Bit device variations by rederiving the weight matrix, enabling them to compute as ideal identical P-Bits without the need for weights retraining. Accurately extracting the <semantics>α</semantics> and <semantics>ΔV</semantics> simultaneously from a large P-Bit array which is prerequisite for the weight compensation method is a crucial and challenging task. To solve this obstacle, we present the novel automatic variation extraction algorithm which can extract device variations of each P-Bit in a large array based on Boltzmann machine learning. In order for the accurate extraction of variations from an extendable P-Bit array, an Ising Hamiltonian based on a 3D ferromagnetic model is constructed, achieving precise and scalable array variation extraction. The proposed Automatic Extraction and Compensation algorithm is utilized to solve both 16-city traveling salesman problem (TSP) and 21-bit integer factorization on a large P-Bit array with variation, demonstrating its accuracy, transferability, and scalability.