Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics
As IoT applications proliferate, the demand for energy-efficient data processing becomes increasingly vital, particularly for devices operating under power constraints. This paper introduces a novel Discrete Cosine Transform (DCT) architecture implemented using reversible logic to meet the requireme...
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| Format: | Article |
| Language: | English |
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IEEE
2025-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10836711/ |
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| author | Muhammad Awais Wilayat Khan Tallha Akram Yunyoung Nam |
| author_facet | Muhammad Awais Wilayat Khan Tallha Akram Yunyoung Nam |
| author_sort | Muhammad Awais |
| collection | DOAJ |
| description | As IoT applications proliferate, the demand for energy-efficient data processing becomes increasingly vital, particularly for devices operating under power constraints. This paper introduces a novel Discrete Cosine Transform (DCT) architecture implemented using reversible logic to meet the requirements for effective data compression in IoT systems, such as smart surveillance and wearable health monitors. The proposed 8-point fully parallel DCT leverages a customized datapath based on a standard cell approach, integrating pass transistor logic and a full custom layout in UMC 90 nm CMOS technology. Comprehensive validation through functional simulations and design rule checks demonstrates the architecture’s reliability. With a compact core area of 0.806 mm2, the DCT operates at a low power consumption of just 1.12 mW, achieving a clock frequency of 257 MHz. This low-power design facilitates significant energy savings while maintaining high performance and low complexity, making it well-suited for energy-constrained IoT applications. |
| format | Article |
| id | doaj-art-4c7cbfef0d154a4ab067e0335b5f7781 |
| institution | Kabale University |
| issn | 2169-3536 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-4c7cbfef0d154a4ab067e0335b5f77812025-01-24T00:01:51ZengIEEEIEEE Access2169-35362025-01-0113122921230710.1109/ACCESS.2025.352826110836711Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer ElectronicsMuhammad Awais0https://orcid.org/0000-0003-3791-4140Wilayat Khan1Tallha Akram2Yunyoung Nam3https://orcid.org/0000-0002-3318-9394Department of Electrical and Computer Engineering, COMSATS University Islamabad, Wah Cantt, PakistanDepartment of Computer Engineering, University of Ha’il, Hail, Saudi ArabiaDepartment of Information Systems, College of Computer Engineering and Sciences, Prince Sattam bin Abdulaziz University, Al-Kharj, Saudi ArabiaDepartment of ICT Convergence, Soonchunhyang University, Asan-si, South KoreaAs IoT applications proliferate, the demand for energy-efficient data processing becomes increasingly vital, particularly for devices operating under power constraints. This paper introduces a novel Discrete Cosine Transform (DCT) architecture implemented using reversible logic to meet the requirements for effective data compression in IoT systems, such as smart surveillance and wearable health monitors. The proposed 8-point fully parallel DCT leverages a customized datapath based on a standard cell approach, integrating pass transistor logic and a full custom layout in UMC 90 nm CMOS technology. Comprehensive validation through functional simulations and design rule checks demonstrates the architecture’s reliability. With a compact core area of 0.806 mm2, the DCT operates at a low power consumption of just 1.12 mW, achieving a clock frequency of 257 MHz. This low-power design facilitates significant energy savings while maintaining high performance and low complexity, making it well-suited for energy-constrained IoT applications.https://ieeexplore.ieee.org/document/10836711/Reversible computinglogic circuitsdigital signal processorslogic gatesenergy efficiencyIoT |
| spellingShingle | Muhammad Awais Wilayat Khan Tallha Akram Yunyoung Nam Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics IEEE Access Reversible computing logic circuits digital signal processors logic gates energy efficiency IoT |
| title | Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics |
| title_full | Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics |
| title_fullStr | Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics |
| title_full_unstemmed | Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics |
| title_short | Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics |
| title_sort | energy efficient discrete cosine transform architecture using reversible logic for iot enabled consumer electronics |
| topic | Reversible computing logic circuits digital signal processors logic gates energy efficiency IoT |
| url | https://ieeexplore.ieee.org/document/10836711/ |
| work_keys_str_mv | AT muhammadawais energyefficientdiscretecosinetransformarchitectureusingreversiblelogicforiotenabledconsumerelectronics AT wilayatkhan energyefficientdiscretecosinetransformarchitectureusingreversiblelogicforiotenabledconsumerelectronics AT tallhaakram energyefficientdiscretecosinetransformarchitectureusingreversiblelogicforiotenabledconsumerelectronics AT yunyoungnam energyefficientdiscretecosinetransformarchitectureusingreversiblelogicforiotenabledconsumerelectronics |