The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology

The calculation and design of an ultralow-power Low Noise Amplifier (LNA) are proposed in this paper. The LNA operates from 5 GHz to 10 GHz, and forward body biasing technique is used to bring down power consumption of the circuit. The design revolves around precise calculations related to input imp...

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Main Author: Hemad Heidari Jobaneh
Format: Article
Language:English
Published: Wiley 2020-01-01
Series:Active and Passive Electronic Components
Online Access:http://dx.doi.org/10.1155/2020/8537405
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author Hemad Heidari Jobaneh
author_facet Hemad Heidari Jobaneh
author_sort Hemad Heidari Jobaneh
collection DOAJ
description The calculation and design of an ultralow-power Low Noise Amplifier (LNA) are proposed in this paper. The LNA operates from 5 GHz to 10 GHz, and forward body biasing technique is used to bring down power consumption of the circuit. The design revolves around precise calculations related to input impedance, output impedance, and the gain of the circuit. MATLAB and Advanced Design System (ADS) are utilized to design and simulate the LNA. In addition, TSMC 0.13 μm CMOS process is used in ADS. The LNA is biased with two different voltage supplies in order to reduce power consumption. Noise Figure (NF), input matching (S11), gain (S21), IIP3, and power dissipation are 1.46 dB–2.27 dB, −11.25 dB, 13.82 dB, −8.5, and 963 μW, respectively.
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series Active and Passive Electronic Components
spelling doaj-art-4a308ac6c5e143eeb03d1a753faab0da2025-02-03T01:05:09ZengWileyActive and Passive Electronic Components0882-75161563-50312020-01-01202010.1155/2020/85374058537405The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS TechnologyHemad Heidari Jobaneh0Department of Electrical Engineering, Azad University, South Tehran Branch, Tehran, IranThe calculation and design of an ultralow-power Low Noise Amplifier (LNA) are proposed in this paper. The LNA operates from 5 GHz to 10 GHz, and forward body biasing technique is used to bring down power consumption of the circuit. The design revolves around precise calculations related to input impedance, output impedance, and the gain of the circuit. MATLAB and Advanced Design System (ADS) are utilized to design and simulate the LNA. In addition, TSMC 0.13 μm CMOS process is used in ADS. The LNA is biased with two different voltage supplies in order to reduce power consumption. Noise Figure (NF), input matching (S11), gain (S21), IIP3, and power dissipation are 1.46 dB–2.27 dB, −11.25 dB, 13.82 dB, −8.5, and 963 μW, respectively.http://dx.doi.org/10.1155/2020/8537405
spellingShingle Hemad Heidari Jobaneh
The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology
Active and Passive Electronic Components
title The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology
title_full The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology
title_fullStr The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology
title_full_unstemmed The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology
title_short The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology
title_sort design of an ultralow power ultra wideband 5 ghz 10 ghz low noise amplifier in 0 13 μm cmos technology
url http://dx.doi.org/10.1155/2020/8537405
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