Mechanism of Threshold Voltage Instability in Double Gate α-IGZO Nanosheet TFT Under Bias and Temperature Stress

ABSTRACT Amorphous indium gallium zinc oxide (a-IGZO)-based thin film transistors (TFTs) are increasingly becoming popular because of their potential in futuristic applications, including CMOS technology. Given the demand for CMOS-compatible, ultra-scaled, reliable, and high-performing devices, we f...

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Main Authors: Muhammad Aslam, Shu-Wei Chang, Yi-Ho Chen, Yao-Jen Lee, Yiming Li, Wen-Hsi Lee
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10540482/
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author Muhammad Aslam
Shu-Wei Chang
Yi-Ho Chen
Yao-Jen Lee
Yiming Li
Wen-Hsi Lee
author_facet Muhammad Aslam
Shu-Wei Chang
Yi-Ho Chen
Yao-Jen Lee
Yiming Li
Wen-Hsi Lee
author_sort Muhammad Aslam
collection DOAJ
description ABSTRACT Amorphous indium gallium zinc oxide (a-IGZO)-based thin film transistors (TFTs) are increasingly becoming popular because of their potential in futuristic applications, including CMOS technology. Given the demand for CMOS-compatible, ultra-scaled, reliable, and high-performing devices, we fabricate and analyze scaled-channel a-IGZO-TFTs with an optimal double-gate structure, a thin nanosheet-based channel, and an effective high- <inline-formula> <tex-math notation="LaTeX">$\kappa$ </tex-math></inline-formula> dielectric namely HfO2. The reliably reported double gate IGZO nanosheet TFTs (DG-IGZO-NS-TFTs) are tested under positive and negative bias stress at variant temperatures, and the resulting modulations are analyzed critically. The reported DG-IGZO-NSTFTs exhibit a negative side threshold voltage shift (<inline-formula> <tex-math notation="LaTeX">$\Delta$ </tex-math></inline-formula>Vth) accompanied by an increase in Ion/Ion(0) under negative bias temperature stress (NBTS) at elevated temperatures, which indicates the presence of additional charges. An anomalous negative side shifting of the Vth is observed under positive bias temperature stress (PBTS), where diffused hydrogen atoms are identified as introducing excess n-type carriers into the channel and causing the observed <inline-formula> <tex-math notation="LaTeX">$\Delta$ </tex-math></inline-formula>Vth. The spectroscopic analysis is performed to establish evidence for the assumed mechanisms, and the role of individual gates is investigated in the context of performance variance under temperature-bias stress. Moreover, the partial reversibility of the stress-induced degradation is experimentally established and methodically discussed. Overall, the reported results offer a comprehensive understanding of scaled-channel DG-NS-IGZO-TFTs, which help shape performance-enhancement strategies, control degradation mechanisms, and define appropriate application scenarios.
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institution Kabale University
issn 2168-6734
language English
publishDate 2024-01-01
publisher IEEE
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series IEEE Journal of the Electron Devices Society
spelling doaj-art-45121ce7cfa14c329d6bc55bdf2925ff2025-01-28T00:00:37ZengIEEEIEEE Journal of the Electron Devices Society2168-67342024-01-011246447110.1109/JEDS.2024.340667610540482Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature StressMuhammad Aslam0https://orcid.org/0009-0009-3173-6516Shu-Wei Chang1https://orcid.org/0000-0002-2555-5622Yi-Ho Chen2https://orcid.org/0000-0002-7941-6193Yao-Jen Lee3https://orcid.org/0000-0001-9643-111XYiming Li4https://orcid.org/0000-0001-7374-0964Wen-Hsi Lee5https://orcid.org/0000-0002-3942-4236Parallel and Scientific Computing Laboratory, National Yang Ming Chiao Tung University, Hsinchu, TaiwanDepartment of Electrical Engineering, National Cheng Kung University, Tainan City, TaiwanParallel and Scientific Computing Laboratory, National Yang Ming Chiao Tung University, Hsinchu, TaiwanInstitute of Pioneer Semiconductor Innovation, Industry Academic Innovation School, National Yang Ming Chiao Tung University, Hsinchu, TaiwanParallel and Scientific Computing Laboratory, National Yang Ming Chiao Tung University, Hsinchu, TaiwanDepartment of Electrical Engineering, National Cheng Kung University, Tainan City, TaiwanABSTRACT Amorphous indium gallium zinc oxide (a-IGZO)-based thin film transistors (TFTs) are increasingly becoming popular because of their potential in futuristic applications, including CMOS technology. Given the demand for CMOS-compatible, ultra-scaled, reliable, and high-performing devices, we fabricate and analyze scaled-channel a-IGZO-TFTs with an optimal double-gate structure, a thin nanosheet-based channel, and an effective high- <inline-formula> <tex-math notation="LaTeX">$\kappa$ </tex-math></inline-formula> dielectric namely HfO2. The reliably reported double gate IGZO nanosheet TFTs (DG-IGZO-NS-TFTs) are tested under positive and negative bias stress at variant temperatures, and the resulting modulations are analyzed critically. The reported DG-IGZO-NSTFTs exhibit a negative side threshold voltage shift (<inline-formula> <tex-math notation="LaTeX">$\Delta$ </tex-math></inline-formula>Vth) accompanied by an increase in Ion/Ion(0) under negative bias temperature stress (NBTS) at elevated temperatures, which indicates the presence of additional charges. An anomalous negative side shifting of the Vth is observed under positive bias temperature stress (PBTS), where diffused hydrogen atoms are identified as introducing excess n-type carriers into the channel and causing the observed <inline-formula> <tex-math notation="LaTeX">$\Delta$ </tex-math></inline-formula>Vth. The spectroscopic analysis is performed to establish evidence for the assumed mechanisms, and the role of individual gates is investigated in the context of performance variance under temperature-bias stress. Moreover, the partial reversibility of the stress-induced degradation is experimentally established and methodically discussed. Overall, the reported results offer a comprehensive understanding of scaled-channel DG-NS-IGZO-TFTs, which help shape performance-enhancement strategies, control degradation mechanisms, and define appropriate application scenarios.https://ieeexplore.ieee.org/document/10540482/Amorphous IGZO-TFTpositive bias temperature stress (PBTS)negative bias temperature stress (NBTS)IGZO-nano-sheetelectrical instabilitieshydrogen-impact
spellingShingle Muhammad Aslam
Shu-Wei Chang
Yi-Ho Chen
Yao-Jen Lee
Yiming Li
Wen-Hsi Lee
Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature Stress
IEEE Journal of the Electron Devices Society
Amorphous IGZO-TFT
positive bias temperature stress (PBTS)
negative bias temperature stress (NBTS)
IGZO-nano-sheet
electrical instabilities
hydrogen-impact
title Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature Stress
title_full Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature Stress
title_fullStr Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature Stress
title_full_unstemmed Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature Stress
title_short Mechanism of Threshold Voltage Instability in Double Gate &#x03B1;-IGZO Nanosheet TFT Under Bias and Temperature Stress
title_sort mechanism of threshold voltage instability in double gate x03b1 igzo nanosheet tft under bias and temperature stress
topic Amorphous IGZO-TFT
positive bias temperature stress (PBTS)
negative bias temperature stress (NBTS)
IGZO-nano-sheet
electrical instabilities
hydrogen-impact
url https://ieeexplore.ieee.org/document/10540482/
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