A Method for Grading Failure Rates Within the Dynamic Effective Space of Integrated Circuits After Testing
Integrated circuits that pass testing still have quality differences, thus making grading necessary. Traditional grading methods rely on static testing and electrical measurements, which are challenging to achieve precise grading, time-consuming, and costly. A new grading method based on the failure...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2025-02-01
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| Series: | Applied Sciences |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2076-3417/15/4/2009 |
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| Summary: | Integrated circuits that pass testing still have quality differences, thus making grading necessary. Traditional grading methods rely on static testing and electrical measurements, which are challenging to achieve precise grading, time-consuming, and costly. A new grading method based on the failure rate within a dynamically effective space is proposed. This method dynamically adjusts the evaluation space and uses an exponential decay function to calculate the influence weight of each neighboring chip on the evaluated chip, thereby computing the weighted failure rate of the evaluated chip and quantitatively grading the chips after wafer testing based on the scores. Experiments show that this method not only accurately captures quality differences and ensures grading accuracy but also significantly improves grading efficiency. |
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| ISSN: | 2076-3417 |