Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite
Low-power operations can be great advantageous for ReRAM devices. However, wasteful overwriting such as the SET operation to low-resistance state (LRS) device and the RESET operation to high-resistance state (HRS) device causes not only an increase in power but also the degradation of the write cycl...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2012-01-01
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| Series: | Active and Passive Electronic Components |
| Online Access: | http://dx.doi.org/10.1155/2012/181395 |
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| _version_ | 1832562522622787584 |
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| author | Takaya Handa Yuhei Yoshimoto Kazuya Nakayama Akio Kitagawa |
| author_facet | Takaya Handa Yuhei Yoshimoto Kazuya Nakayama Akio Kitagawa |
| author_sort | Takaya Handa |
| collection | DOAJ |
| description | Low-power operations can be great advantageous for ReRAM devices. However, wasteful overwriting such as the SET operation to low-resistance state (LRS) device and the RESET operation to high-resistance state (HRS) device causes not only an increase in power but also the degradation of the write cycles due to repeatedly rewriting. Thus, in this paper, we proposed a novel automatic avoidance circuit for dealing with wasteful overwriting that uses a sense amplifier and estimated the energy consumption reduction rate by conducting a circuit simulation. As a result, this circuit helped to reliably avoid the wasteful overwriting operation to reduce about 99% and 97% of wasteful energy using VSRC and CSRC, respectively. |
| format | Article |
| id | doaj-art-36ff1ff49b144671939f83c91748f408 |
| institution | Kabale University |
| issn | 0882-7516 1563-5031 |
| language | English |
| publishDate | 2012-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Active and Passive Electronic Components |
| spelling | doaj-art-36ff1ff49b144671939f83c91748f4082025-02-03T01:22:28ZengWileyActive and Passive Electronic Components0882-75161563-50312012-01-01201210.1155/2012/181395181395Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful OverwriteTakaya Handa0Yuhei Yoshimoto1Kazuya Nakayama2Akio Kitagawa3School of Electrical and Computer Engineering, College of Science and Engineering, Kanazawa University, Kakuma, Kanazawa 920-1192, JapanSchool of Electrical and Computer Engineering, College of Science and Engineering, Kanazawa University, Kakuma, Kanazawa 920-1192, JapanSchool of Health Sciences, College of Medical, Pharmaceutical and Health Sciences, Kanazawa University, 5-11-80 Kodatsuno, Kanazawa 920–0942, JapanSchool of Electrical and Computer Engineering, College of Science and Engineering, Kanazawa University, Kakuma, Kanazawa 920-1192, JapanLow-power operations can be great advantageous for ReRAM devices. However, wasteful overwriting such as the SET operation to low-resistance state (LRS) device and the RESET operation to high-resistance state (HRS) device causes not only an increase in power but also the degradation of the write cycles due to repeatedly rewriting. Thus, in this paper, we proposed a novel automatic avoidance circuit for dealing with wasteful overwriting that uses a sense amplifier and estimated the energy consumption reduction rate by conducting a circuit simulation. As a result, this circuit helped to reliably avoid the wasteful overwriting operation to reduce about 99% and 97% of wasteful energy using VSRC and CSRC, respectively.http://dx.doi.org/10.1155/2012/181395 |
| spellingShingle | Takaya Handa Yuhei Yoshimoto Kazuya Nakayama Akio Kitagawa Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite Active and Passive Electronic Components |
| title | Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite |
| title_full | Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite |
| title_fullStr | Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite |
| title_full_unstemmed | Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite |
| title_short | Novel Power Reduction Technique for ReRAM with Automatic Avoidance Circuit for Wasteful Overwrite |
| title_sort | novel power reduction technique for reram with automatic avoidance circuit for wasteful overwrite |
| url | http://dx.doi.org/10.1155/2012/181395 |
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