Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic
State-of-the-art object recognition and pose estimation systems often utilize point feature algorithms, which in turn usually require the computing power of conventional PC hardware. In this paper, we describe two embedded systems for object detection and pose estimation using sophisticated point fe...
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Main Authors: | , , |
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Format: | Article |
Language: | English |
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Wiley
2012-01-01
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Series: | International Journal of Reconfigurable Computing |
Online Access: | http://dx.doi.org/10.1155/2012/368351 |
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author | Michael Schaeferling Ulrich Hornung Gundolf Kiefer |
author_facet | Michael Schaeferling Ulrich Hornung Gundolf Kiefer |
author_sort | Michael Schaeferling |
collection | DOAJ |
description | State-of-the-art object recognition and pose estimation
systems often utilize point feature algorithms, which in
turn usually require the computing power of conventional PC
hardware. In this paper, we describe two embedded systems for
object detection and pose estimation using sophisticated point
features. The feature detection step of the “Speeded-up Robust
Features (SURF)” algorithm is accelerated by a special IP core.
The first system performs object detection and is completely
implemented in a single medium-size Virtex-5 FPGA. The second
system is an augmented reality platform, which consists of an
ARM-based microcontroller and intelligent FPGA-based cameras
which support the main system. |
format | Article |
id | doaj-art-329801c445414d1c930d482a75b3068e |
institution | Kabale University |
issn | 1687-7195 1687-7209 |
language | English |
publishDate | 2012-01-01 |
publisher | Wiley |
record_format | Article |
series | International Journal of Reconfigurable Computing |
spelling | doaj-art-329801c445414d1c930d482a75b3068e2025-02-03T05:45:43ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092012-01-01201210.1155/2012/368351368351Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA LogicMichael Schaeferling0Ulrich Hornung1Gundolf Kiefer2Department of Computer Science, Augsburg University of Applied Sciences, An der Hochschule 1, 86161 Augsburg, GermanyDepartment of Computer Science, Augsburg University of Applied Sciences, An der Hochschule 1, 86161 Augsburg, GermanyDepartment of Computer Science, Augsburg University of Applied Sciences, An der Hochschule 1, 86161 Augsburg, GermanyState-of-the-art object recognition and pose estimation systems often utilize point feature algorithms, which in turn usually require the computing power of conventional PC hardware. In this paper, we describe two embedded systems for object detection and pose estimation using sophisticated point features. The feature detection step of the “Speeded-up Robust Features (SURF)” algorithm is accelerated by a special IP core. The first system performs object detection and is completely implemented in a single medium-size Virtex-5 FPGA. The second system is an augmented reality platform, which consists of an ARM-based microcontroller and intelligent FPGA-based cameras which support the main system.http://dx.doi.org/10.1155/2012/368351 |
spellingShingle | Michael Schaeferling Ulrich Hornung Gundolf Kiefer Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic International Journal of Reconfigurable Computing |
title | Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic |
title_full | Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic |
title_fullStr | Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic |
title_full_unstemmed | Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic |
title_short | Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic |
title_sort | object recognition and pose estimation on embedded hardware surf based system designs accelerated by fpga logic |
url | http://dx.doi.org/10.1155/2012/368351 |
work_keys_str_mv | AT michaelschaeferling objectrecognitionandposeestimationonembeddedhardwaresurfbasedsystemdesignsacceleratedbyfpgalogic AT ulrichhornung objectrecognitionandposeestimationonembeddedhardwaresurfbasedsystemdesignsacceleratedbyfpgalogic AT gundolfkiefer objectrecognitionandposeestimationonembeddedhardwaresurfbasedsystemdesignsacceleratedbyfpgalogic |