Yuanbo, K., Zeyu, Q., Liang, W., & Jianqiang, H. Sorting algorithm acceleration based on CPU-FPGA heterogeneous system. National Computer System Engineering Research Institute of China.
Chicago Style (17th ed.) CitationYuanbo, Kou, Qiu Zeyu, Wang Liang, and Huang Jianqiang. Sorting Algorithm Acceleration Based on CPU-FPGA Heterogeneous System. National Computer System Engineering Research Institute of China.
MLA (9th ed.) CitationYuanbo, Kou, et al. Sorting Algorithm Acceleration Based on CPU-FPGA Heterogeneous System. National Computer System Engineering Research Institute of China.
Warning: These citations may not always be 100% accurate.