APA (7th ed.) Citation

Bui, T., & Shibata, T. A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique. Wiley.

Chicago Style (17th ed.) Citation

Bui, Trong-Tu, and Tadashi Shibata. A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique. Wiley.

MLA (9th ed.) Citation

Bui, Trong-Tu, and Tadashi Shibata. A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique. Wiley.

Warning: These citations may not always be 100% accurate.