Challenges in Clock Synchronization for On-Site Coding Digital Beamformer
Typical radio frequency (RF) digital beamformers can be highly complex. In addition to a suitable antenna array, they require numerous receiver chains, demodulators, data converter arrays, and digital signal processors. To recover and reconstruct the received signal, synchronization is required sinc...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2017-01-01
|
| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2017/7802735 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1832548938599628800 |
|---|---|
| author | Satheesh Bojja Venkatakrishnan Elias A. Alwan John L. Volakis |
| author_facet | Satheesh Bojja Venkatakrishnan Elias A. Alwan John L. Volakis |
| author_sort | Satheesh Bojja Venkatakrishnan |
| collection | DOAJ |
| description | Typical radio frequency (RF) digital beamformers can be highly complex. In addition to a suitable antenna array, they require numerous receiver chains, demodulators, data converter arrays, and digital signal processors. To recover and reconstruct the received signal, synchronization is required since the analog-to-digital converters (ADCs), digital-to-analog converters (DACs), field programmable gate arrays (FPGAs), and local oscillators are all clocked at different frequencies. In this article, we present a clock synchronization topology for a multichannel on-site coding receiver (OSCR) using the FPGA as a master clock to drive all RF blocks. This approach reduces synchronization errors by a factor of 8, when compared to conventional digital beamformer. |
| format | Article |
| id | doaj-art-2a0302a4e2f0426c92a8b99eaf7ab011 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2017-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-2a0302a4e2f0426c92a8b99eaf7ab0112025-02-03T06:12:39ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092017-01-01201710.1155/2017/78027357802735Challenges in Clock Synchronization for On-Site Coding Digital BeamformerSatheesh Bojja Venkatakrishnan0Elias A. Alwan1John L. Volakis2Department of Electrical and Computer Engineering, Florida International University, Miami, FL 33174, USADepartment of Electrical and Computer Engineering, Florida International University, Miami, FL 33174, USADepartment of Electrical and Computer Engineering, Florida International University, Miami, FL 33174, USATypical radio frequency (RF) digital beamformers can be highly complex. In addition to a suitable antenna array, they require numerous receiver chains, demodulators, data converter arrays, and digital signal processors. To recover and reconstruct the received signal, synchronization is required since the analog-to-digital converters (ADCs), digital-to-analog converters (DACs), field programmable gate arrays (FPGAs), and local oscillators are all clocked at different frequencies. In this article, we present a clock synchronization topology for a multichannel on-site coding receiver (OSCR) using the FPGA as a master clock to drive all RF blocks. This approach reduces synchronization errors by a factor of 8, when compared to conventional digital beamformer.http://dx.doi.org/10.1155/2017/7802735 |
| spellingShingle | Satheesh Bojja Venkatakrishnan Elias A. Alwan John L. Volakis Challenges in Clock Synchronization for On-Site Coding Digital Beamformer International Journal of Reconfigurable Computing |
| title | Challenges in Clock Synchronization for On-Site Coding Digital Beamformer |
| title_full | Challenges in Clock Synchronization for On-Site Coding Digital Beamformer |
| title_fullStr | Challenges in Clock Synchronization for On-Site Coding Digital Beamformer |
| title_full_unstemmed | Challenges in Clock Synchronization for On-Site Coding Digital Beamformer |
| title_short | Challenges in Clock Synchronization for On-Site Coding Digital Beamformer |
| title_sort | challenges in clock synchronization for on site coding digital beamformer |
| url | http://dx.doi.org/10.1155/2017/7802735 |
| work_keys_str_mv | AT satheeshbojjavenkatakrishnan challengesinclocksynchronizationforonsitecodingdigitalbeamformer AT eliasaalwan challengesinclocksynchronizationforonsitecodingdigitalbeamformer AT johnlvolakis challengesinclocksynchronizationforonsitecodingdigitalbeamformer |