Memristor-based feature learning for pattern classification
Abstract Inspired by biological processes, feature learning techniques, such as deep learning, have achieved great success in various fields. However, since biological organs may operate differently from semiconductor devices, deep models usually require dedicated hardware and are computation-comple...
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| Main Authors: | , , , , , , , , , , , , , , |
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| Format: | Article |
| Language: | English |
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Nature Portfolio
2025-01-01
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| Series: | Nature Communications |
| Online Access: | https://doi.org/10.1038/s41467-025-56286-y |
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| _version_ | 1832585553769398272 |
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| author | Tuo Shi Lili Gao Yang Tian Shuangzhu Tang Jinchang Liu Yiqi Li Ruixi Zhou Shiyu Cui Hui Zhang Yu Li Zuheng Wu Xumeng Zhang Taihao Li Xiaobing Yan Qi Liu |
| author_facet | Tuo Shi Lili Gao Yang Tian Shuangzhu Tang Jinchang Liu Yiqi Li Ruixi Zhou Shiyu Cui Hui Zhang Yu Li Zuheng Wu Xumeng Zhang Taihao Li Xiaobing Yan Qi Liu |
| author_sort | Tuo Shi |
| collection | DOAJ |
| description | Abstract Inspired by biological processes, feature learning techniques, such as deep learning, have achieved great success in various fields. However, since biological organs may operate differently from semiconductor devices, deep models usually require dedicated hardware and are computation-complex. High energy consumption has made deep model growth unsustainable. We present an approach that directly implements feature learning using semiconductor physics to minimize disparity between model and hardware. Following this approach, a feature learning technique based on memristor drift-diffusion kinetics is proposed by leveraging the dynamic response of a single memristor to learn features. The model parameters and computational operations of the kinetics-based network are reduced by up to 2 and 4 orders of magnitude, respectively, compared with deep models. We experimentally implement the proposed network on 180 nm memristor chips for various dimensional pattern classification tasks. Compared with memristor-based deep learning hardware, the memristor kinetics-based hardware can further reduce energy and area consumption significantly. We propose that innovations in hardware physics could create an intriguing solution for intelligent models by balancing model complexity and performance. |
| format | Article |
| id | doaj-art-29b39a8817ff43ca91aeb4380562c45d |
| institution | Kabale University |
| issn | 2041-1723 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | Nature Portfolio |
| record_format | Article |
| series | Nature Communications |
| spelling | doaj-art-29b39a8817ff43ca91aeb4380562c45d2025-01-26T12:40:53ZengNature PortfolioNature Communications2041-17232025-01-0116111310.1038/s41467-025-56286-yMemristor-based feature learning for pattern classificationTuo Shi0Lili Gao1Yang Tian2Shuangzhu Tang3Jinchang Liu4Yiqi Li5Ruixi Zhou6Shiyu Cui7Hui Zhang8Yu Li9Zuheng Wu10Xumeng Zhang11Taihao Li12Xiaobing Yan13Qi Liu14Zhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryZhejiang LaboratoryFrontier Institute of Chip and System, Fudan UniversitySchool of Integrated Circuits, Anhui UniversityFrontier Institute of Chip and System, Fudan UniversityZhejiang LaboratoryKey Laboratory of Brain-like Neuromorphic Devices and Systems of Hebei Province, Hebei UniversityFrontier Institute of Chip and System, Fudan UniversityAbstract Inspired by biological processes, feature learning techniques, such as deep learning, have achieved great success in various fields. However, since biological organs may operate differently from semiconductor devices, deep models usually require dedicated hardware and are computation-complex. High energy consumption has made deep model growth unsustainable. We present an approach that directly implements feature learning using semiconductor physics to minimize disparity between model and hardware. Following this approach, a feature learning technique based on memristor drift-diffusion kinetics is proposed by leveraging the dynamic response of a single memristor to learn features. The model parameters and computational operations of the kinetics-based network are reduced by up to 2 and 4 orders of magnitude, respectively, compared with deep models. We experimentally implement the proposed network on 180 nm memristor chips for various dimensional pattern classification tasks. Compared with memristor-based deep learning hardware, the memristor kinetics-based hardware can further reduce energy and area consumption significantly. We propose that innovations in hardware physics could create an intriguing solution for intelligent models by balancing model complexity and performance.https://doi.org/10.1038/s41467-025-56286-y |
| spellingShingle | Tuo Shi Lili Gao Yang Tian Shuangzhu Tang Jinchang Liu Yiqi Li Ruixi Zhou Shiyu Cui Hui Zhang Yu Li Zuheng Wu Xumeng Zhang Taihao Li Xiaobing Yan Qi Liu Memristor-based feature learning for pattern classification Nature Communications |
| title | Memristor-based feature learning for pattern classification |
| title_full | Memristor-based feature learning for pattern classification |
| title_fullStr | Memristor-based feature learning for pattern classification |
| title_full_unstemmed | Memristor-based feature learning for pattern classification |
| title_short | Memristor-based feature learning for pattern classification |
| title_sort | memristor based feature learning for pattern classification |
| url | https://doi.org/10.1038/s41467-025-56286-y |
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