Physics-Based Compact Model of Independent Dual-Gate BEOL-Transistors for Reliable Capacitorless Memory
Capacitorless DRAM architectures based on Back-End-of-Line (BEOL)-transistors are promising for long-retention, high-density and low-power 3D DRAM solutions due to its low leakage, operational flexibility, and monolithic integration capability. Different from classical silicon-based devices, in-dept...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10508593/ |
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| Summary: | Capacitorless DRAM architectures based on Back-End-of-Line (BEOL)-transistors are promising for long-retention, high-density and low-power 3D DRAM solutions due to its low leakage, operational flexibility, and monolithic integration capability. Different from classical silicon-based devices, in-depth studies on the performances of nanoscale multi-gate transistors (e.g., a-InGaZnO-FET) are still barely conducted for physical description, due to the complicated multi-gating principle, finite-size effects on transport, increased variation sources and enlarged parasitic effect. Hence, high-performance multi-nanoscale (down to <inline-formula> <tex-math notation="LaTeX">$\sim ~50$ </tex-math></inline-formula> nm) dual-gate a-IGZO transistors are fabricated, and a physical compact model is developed based on the surface potential for dual-gated coupling and the disordered transport with finite-size-correction. The short channel behaviors on sub-threshold swing, mobility and threshold voltage are investigated, and contact effects are validated by the transfer-line method (TLM). Regarding the specific challenge of dual-gate alignment, possible misalignment and parasitic effects on multi-device fluctuations are important of large-scale circuit design and analyzed by TCAD simulations. Besides, the bias-temperature instability (BTI) has been comprehensively investigated. In awareness of the above effects, this model bridges fabrication-based material properties and structural parameters, assisting in a threshold fluctuation-resistant operation scheme for capacitorless multi-bit memory, showing a great potential in future monolithic integration circuit design using BEOL-transistor. |
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| ISSN: | 2168-6734 |