Intelligent On/Off Dynamic Link Management for On-Chip Networks

Networks-on-chips (NoCs) provide scalable on-chip communication and are expected to be the dominant interconnection architectures in multicore and manycore systems. Power consumption, however, is a major limitation in NoCs today, and researchers have been constantly working on reducing both dynamic...

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Main Authors: Andreas G. Savva, Theocharis Theocharides, Vassos Soteriou
Format: Article
Language:English
Published: Wiley 2012-01-01
Series:Journal of Electrical and Computer Engineering
Online Access:http://dx.doi.org/10.1155/2012/107821
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author Andreas G. Savva
Theocharis Theocharides
Vassos Soteriou
author_facet Andreas G. Savva
Theocharis Theocharides
Vassos Soteriou
author_sort Andreas G. Savva
collection DOAJ
description Networks-on-chips (NoCs) provide scalable on-chip communication and are expected to be the dominant interconnection architectures in multicore and manycore systems. Power consumption, however, is a major limitation in NoCs today, and researchers have been constantly working on reducing both dynamic and static power. Among the NoC components, links that connect the NoC routers are the most power-hungry components. Several attempts have been made to reduce the link power consumption at both the circuit level and the system level. Most past research efforts have proposed selective on/off link state switching based on system-level information based on link utilization levels. Most of these proposed algorithms focus on a pessimistic and simple static threshold mechanism which determines whether or not a link should be turned on/off. This paper presents an intelligent dynamic power management policy for NoCs with improved predictive abilities based on supervised online learning of the system status (i.e., expected future utilization link levels), where links are turned off and on via the use of a small and scalable neural network. Simulation results with various synthetic traffic models over various network topologies show that the proposed work can reach up to 13% power savings when compared to a trivial threshold computation, at very low (<4%) hardware overheads.
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spelling doaj-art-230a58f5cd594badbf25f156071a746b2025-02-03T01:26:38ZengWileyJournal of Electrical and Computer Engineering2090-01472090-01552012-01-01201210.1155/2012/107821107821Intelligent On/Off Dynamic Link Management for On-Chip NetworksAndreas G. Savva0Theocharis Theocharides1Vassos Soteriou2Department of Electrical and Computer Engineering, University of Cyprus, 1678 Nicosia, CyprusDepartment of Electrical and Computer Engineering, University of Cyprus, 1678 Nicosia, CyprusDepartment of Electrical Engineering and Information Technology, Cyprus University of Technology, 3036 Limassol, CyprusNetworks-on-chips (NoCs) provide scalable on-chip communication and are expected to be the dominant interconnection architectures in multicore and manycore systems. Power consumption, however, is a major limitation in NoCs today, and researchers have been constantly working on reducing both dynamic and static power. Among the NoC components, links that connect the NoC routers are the most power-hungry components. Several attempts have been made to reduce the link power consumption at both the circuit level and the system level. Most past research efforts have proposed selective on/off link state switching based on system-level information based on link utilization levels. Most of these proposed algorithms focus on a pessimistic and simple static threshold mechanism which determines whether or not a link should be turned on/off. This paper presents an intelligent dynamic power management policy for NoCs with improved predictive abilities based on supervised online learning of the system status (i.e., expected future utilization link levels), where links are turned off and on via the use of a small and scalable neural network. Simulation results with various synthetic traffic models over various network topologies show that the proposed work can reach up to 13% power savings when compared to a trivial threshold computation, at very low (<4%) hardware overheads.http://dx.doi.org/10.1155/2012/107821
spellingShingle Andreas G. Savva
Theocharis Theocharides
Vassos Soteriou
Intelligent On/Off Dynamic Link Management for On-Chip Networks
Journal of Electrical and Computer Engineering
title Intelligent On/Off Dynamic Link Management for On-Chip Networks
title_full Intelligent On/Off Dynamic Link Management for On-Chip Networks
title_fullStr Intelligent On/Off Dynamic Link Management for On-Chip Networks
title_full_unstemmed Intelligent On/Off Dynamic Link Management for On-Chip Networks
title_short Intelligent On/Off Dynamic Link Management for On-Chip Networks
title_sort intelligent on off dynamic link management for on chip networks
url http://dx.doi.org/10.1155/2012/107821
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