Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance
Abstract In this study, the authors propose a work function engineered (WFE) triple metal (TM) tunnel field‐effect transistor (TFET) device, which exhibits lower subthreshold slope (SS) and better on to off current ratio in comparison with conventional double gate TFET and dual metal TFET device. An...
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| Format: | Article |
| Language: | English |
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Wiley
2021-01-01
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| Series: | IET Circuits, Devices and Systems |
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| Online Access: | https://doi.org/10.1049/cds2.12009 |
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| author | Ria Bose Jatindra Nath Roy |
| author_facet | Ria Bose Jatindra Nath Roy |
| author_sort | Ria Bose |
| collection | DOAJ |
| description | Abstract In this study, the authors propose a work function engineered (WFE) triple metal (TM) tunnel field‐effect transistor (TFET) device, which exhibits lower subthreshold slope (SS) and better on to off current ratio in comparison with conventional double gate TFET and dual metal TFET device. An analytical model is formulated to study the performance of the proposed device. A simulation‐based study of these TFET devices has been carried out with the help of 2D TCAD (Technology Computer Aided Design) Sentaurus device simulator for different channel length values in order to validate our proposed mathematical model. The source side n + pocket in the proposed triple metal (TM) TFET device enhances tunnelling probability thus increasing on current and off current is controlled by another n‐pocket near drain side. Significantly lower subthreshold slope (less than 10 mV/decade), high transconductance (in the order of 10−4 S/μm), low energy‐delay product (24.601 fJ‐ns/μm) obtained for TM WFE TFET makes this device more suitable for digital logic and RF (Radio Frequency) application. |
| format | Article |
| id | doaj-art-1c50e93b04fe42cdb74801e699649923 |
| institution | Kabale University |
| issn | 1751-858X 1751-8598 |
| language | English |
| publishDate | 2021-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | IET Circuits, Devices and Systems |
| spelling | doaj-art-1c50e93b04fe42cdb74801e6996499232025-02-03T01:29:38ZengWileyIET Circuits, Devices and Systems1751-858X1751-85982021-01-01151111910.1049/cds2.12009Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performanceRia Bose0Jatindra Nath Roy1Advanced Technology Development Centre Indian Institute of Technology Kharagpur West Bengal IndiaAdvanced Technology Development Centre Indian Institute of Technology Kharagpur West Bengal IndiaAbstract In this study, the authors propose a work function engineered (WFE) triple metal (TM) tunnel field‐effect transistor (TFET) device, which exhibits lower subthreshold slope (SS) and better on to off current ratio in comparison with conventional double gate TFET and dual metal TFET device. An analytical model is formulated to study the performance of the proposed device. A simulation‐based study of these TFET devices has been carried out with the help of 2D TCAD (Technology Computer Aided Design) Sentaurus device simulator for different channel length values in order to validate our proposed mathematical model. The source side n + pocket in the proposed triple metal (TM) TFET device enhances tunnelling probability thus increasing on current and off current is controlled by another n‐pocket near drain side. Significantly lower subthreshold slope (less than 10 mV/decade), high transconductance (in the order of 10−4 S/μm), low energy‐delay product (24.601 fJ‐ns/μm) obtained for TM WFE TFET makes this device more suitable for digital logic and RF (Radio Frequency) application.https://doi.org/10.1049/cds2.12009probabilitysemiconductor device modelstechnology CAD (electronics)tunnel field‐effect transistors |
| spellingShingle | Ria Bose Jatindra Nath Roy Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance IET Circuits, Devices and Systems probability semiconductor device models technology CAD (electronics) tunnel field‐effect transistors |
| title | Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance |
| title_full | Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance |
| title_fullStr | Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance |
| title_full_unstemmed | Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance |
| title_short | Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance |
| title_sort | analytical model and simulation based analysis of a work function engineered triple metal tunnel field effect transistor device showing excellent device performance |
| topic | probability semiconductor device models technology CAD (electronics) tunnel field‐effect transistors |
| url | https://doi.org/10.1049/cds2.12009 |
| work_keys_str_mv | AT riabose analyticalmodelandsimulationbasedanalysisofaworkfunctionengineeredtriplemetaltunnelfieldeffecttransistordeviceshowingexcellentdeviceperformance AT jatindranathroy analyticalmodelandsimulationbasedanalysisofaworkfunctionengineeredtriplemetaltunnelfieldeffecttransistordeviceshowingexcellentdeviceperformance |