On Self-Timed Circuits in Real-Time Systems
While asynchronous logic has many potential advantages compared to traditional synchronous designs, one of the major drawbacks is its unpredictability with respect to temporal behavior. Having no high-precision oscillator, a self-timed circuit's execution speed is heavily dependent on temperatu...
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| Format: | Article |
| Language: | English |
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Wiley
2011-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2011/972375 |
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| _version_ | 1832564042692034560 |
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| author | Markus Ferringer |
| author_facet | Markus Ferringer |
| author_sort | Markus Ferringer |
| collection | DOAJ |
| description | While asynchronous logic has many potential advantages
compared to traditional synchronous designs, one of the
major drawbacks is its unpredictability with respect to temporal
behavior. Having no high-precision oscillator, a self-timed circuit's
execution speed is heavily dependent on temperature and
supply voltage. Small fluctuations of these parameters already
result in noticeable changes of the design's throughput and
performance. Without further provisions this jitter makes the use
of asynchronous logic hardly feasible for real-time applications.
We investigate the temporal characteristics of self-timed circuits
regarding their usage in real-time systems, especially the
Time-Triggered Protocol. We propose a simple timing model and
elaborate a self-adapting circuit which shall derive a suitable
notion of time for both bit transmission and protocol execution.
We further introduce and analyze our jitter compensation concept,
which is a threefold mechanism to keep the asynchronous
circuit's notion of time tightly synchronized to the remaining
communication participants. To demonstrate the robustness of
our solution, we perform different tests and investigate their
impact on jitter and frequency stability. |
| format | Article |
| id | doaj-art-1996e907bf3b4793be7a9fad0ab72329 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2011-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-1996e907bf3b4793be7a9fad0ab723292025-02-03T01:11:50ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092011-01-01201110.1155/2011/972375972375On Self-Timed Circuits in Real-Time SystemsMarkus Ferringer0Department of Computer Engineering, Embedded Computing Systems Group, Vienna University of Technology, Treitlstraße 3, 1040 Vienna, AustriaWhile asynchronous logic has many potential advantages compared to traditional synchronous designs, one of the major drawbacks is its unpredictability with respect to temporal behavior. Having no high-precision oscillator, a self-timed circuit's execution speed is heavily dependent on temperature and supply voltage. Small fluctuations of these parameters already result in noticeable changes of the design's throughput and performance. Without further provisions this jitter makes the use of asynchronous logic hardly feasible for real-time applications. We investigate the temporal characteristics of self-timed circuits regarding their usage in real-time systems, especially the Time-Triggered Protocol. We propose a simple timing model and elaborate a self-adapting circuit which shall derive a suitable notion of time for both bit transmission and protocol execution. We further introduce and analyze our jitter compensation concept, which is a threefold mechanism to keep the asynchronous circuit's notion of time tightly synchronized to the remaining communication participants. To demonstrate the robustness of our solution, we perform different tests and investigate their impact on jitter and frequency stability.http://dx.doi.org/10.1155/2011/972375 |
| spellingShingle | Markus Ferringer On Self-Timed Circuits in Real-Time Systems International Journal of Reconfigurable Computing |
| title | On Self-Timed Circuits in Real-Time Systems |
| title_full | On Self-Timed Circuits in Real-Time Systems |
| title_fullStr | On Self-Timed Circuits in Real-Time Systems |
| title_full_unstemmed | On Self-Timed Circuits in Real-Time Systems |
| title_short | On Self-Timed Circuits in Real-Time Systems |
| title_sort | on self timed circuits in real time systems |
| url | http://dx.doi.org/10.1155/2011/972375 |
| work_keys_str_mv | AT markusferringer onselftimedcircuitsinrealtimesystems |