Study on the Stress and Warpage of Flip Chip Package Under Current Crowding - SHE Chenhui; YANG Longlong; TAN Lipeng; LIU Peisheng (Nantong Daxue xuebao. Ziran kexue ban)
In order to study the influence of current accumulation on flip chip packaging a three-dimensional package model of flip chip is built and the electro-thermal and thermal-structure couplings are analyzed with finite element technique to obtain the temperature distribution stress distribution and displacement for the flip chip ball grid array(FCBGA) package. The results show that the highest temperature appears in the center of the epoxy resin for the package and the chip has the highest temperature at the solder bumps where the current is concentrated; the displacement of the package increases from the center to the edge. The maximum displacement is at the corner furthest from the center. The findings can be applied in the FCBGA package design.