Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage

This paper deals with the modeling of fault for analog circuits. A two-dimensional (2D) fault model is first proposed based on collaborative analysis of supply current and output voltage. This model is a family of circle loci on the complex plane, and it simplifies greatly the algorithms for test po...

Full description

Saved in:
Bibliographic Details
Main Authors: Hongzhi Hu, Shulin Tian, Qing Guo
Format: Article
Language:English
Published: Wiley 2015-01-01
Series:Journal of Applied Mathematics
Online Access:http://dx.doi.org/10.1155/2015/851837
Tags: Add Tag
No Tags, Be the first to tag this record!
_version_ 1832568265425027072
author Hongzhi Hu
Shulin Tian
Qing Guo
author_facet Hongzhi Hu
Shulin Tian
Qing Guo
author_sort Hongzhi Hu
collection DOAJ
description This paper deals with the modeling of fault for analog circuits. A two-dimensional (2D) fault model is first proposed based on collaborative analysis of supply current and output voltage. This model is a family of circle loci on the complex plane, and it simplifies greatly the algorithms for test point selection and potential fault simulations, which are primary difficulties in fault diagnosis of analog circuits. Furthermore, in order to reduce the difficulty of fault location, an improved fault model in three-dimensional (3D) complex space is proposed, which achieves a far better fault detection ratio (FDR) against measurement error and parametric tolerance. To address the problem of fault masking in both 2D and 3D fault models, this paper proposes an effective design for testability (DFT) method. By adding redundant bypassing-components in the circuit under test (CUT), this method achieves excellent fault isolation ratio (FIR) in ambiguity group isolation. The efficacy of the proposed model and testing method is validated through experimental results provided in this paper.
format Article
id doaj-art-0fe91bfbab83441e8d27eadd9ce95d64
institution Kabale University
issn 1110-757X
1687-0042
language English
publishDate 2015-01-01
publisher Wiley
record_format Article
series Journal of Applied Mathematics
spelling doaj-art-0fe91bfbab83441e8d27eadd9ce95d642025-02-03T00:59:19ZengWileyJournal of Applied Mathematics1110-757X1687-00422015-01-01201510.1155/2015/851837851837Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output VoltageHongzhi Hu0Shulin Tian1Qing Guo2School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu 611731, ChinaSchool of Automation Engineering, University of Electronic Science and Technology of China, Chengdu 611731, ChinaGuangxi Key Laboratory of Automatic Detecting Technology and Instrument, Guilin University of Electronic Technology, Guilin 541004, ChinaThis paper deals with the modeling of fault for analog circuits. A two-dimensional (2D) fault model is first proposed based on collaborative analysis of supply current and output voltage. This model is a family of circle loci on the complex plane, and it simplifies greatly the algorithms for test point selection and potential fault simulations, which are primary difficulties in fault diagnosis of analog circuits. Furthermore, in order to reduce the difficulty of fault location, an improved fault model in three-dimensional (3D) complex space is proposed, which achieves a far better fault detection ratio (FDR) against measurement error and parametric tolerance. To address the problem of fault masking in both 2D and 3D fault models, this paper proposes an effective design for testability (DFT) method. By adding redundant bypassing-components in the circuit under test (CUT), this method achieves excellent fault isolation ratio (FIR) in ambiguity group isolation. The efficacy of the proposed model and testing method is validated through experimental results provided in this paper.http://dx.doi.org/10.1155/2015/851837
spellingShingle Hongzhi Hu
Shulin Tian
Qing Guo
Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage
Journal of Applied Mathematics
title Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage
title_full Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage
title_fullStr Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage
title_full_unstemmed Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage
title_short Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage
title_sort fault modeling and testing for analog circuits in complex space based on supply current and output voltage
url http://dx.doi.org/10.1155/2015/851837
work_keys_str_mv AT hongzhihu faultmodelingandtestingforanalogcircuitsincomplexspacebasedonsupplycurrentandoutputvoltage
AT shulintian faultmodelingandtestingforanalogcircuitsincomplexspacebasedonsupplycurrentandoutputvoltage
AT qingguo faultmodelingandtestingforanalogcircuitsincomplexspacebasedonsupplycurrentandoutputvoltage