VLSI Architectures for Sliding-Window-Based Space-Time Turbo Trellis Code Decoders
The VLSI implementation of SISO-MAP decoders used for traditional iterative turbo coding has been investigated in the literature. In this paper, a complete architectural model of a space-time turbo code receiver that includes elementary decoders is presented. These architectures are based on newly p...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2012-01-01
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| Series: | Journal of Electrical and Computer Engineering |
| Online Access: | http://dx.doi.org/10.1155/2012/614259 |
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