DPFFs: C2MOS Direct Path Flip-Flops for Process-Resilient Ultradynamic Voltage Scaling
We propose two master-slave flip-flops (FFs) that utilize the clocked CMOS (C2MOS) technique with an internal direct connection along the main signal propagation path between the master and slave latches and adopt an adaptive body bias technique to improve circuit robustness. C2MOS structure improve...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2016-01-01
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| Series: | Journal of Electrical and Computer Engineering |
| Online Access: | http://dx.doi.org/10.1155/2016/8268917 |
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