Development of Floating-Point MAC Engine for 2-D Convolution of Image
In the emerging trend of Graphics Processing Architecture, IEEE 754-2008 Floating point numbers are being widely used. Convolution is one of the standard operations in image processing applications, and because of its computationally intensive nature, an appropriate and efficient image processing ar...
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IEEE
2021-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/9557274/ |
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| author | Ajay Kumar Sahu Vishnumurthy Kedlaya K. Subramanya G. Nayak |
| author_facet | Ajay Kumar Sahu Vishnumurthy Kedlaya K. Subramanya G. Nayak |
| author_sort | Ajay Kumar Sahu |
| collection | DOAJ |
| description | In the emerging trend of Graphics Processing Architecture, IEEE 754-2008 Floating point numbers are being widely used. Convolution is one of the standard operations in image processing applications, and because of its computationally intensive nature, an appropriate and efficient image processing architecture is of great need. This paper proposes a single-precision Floating Point MAC engine to accelerate the sliding window algorithm for the 2-D convolution of image. The engine uses a modified algorithm for virtual zero-padding that saves memory space, and it also provides configurable parameters to specify filter and image size. A low power multiplier with reduced dynamic power, specifically when operating on pixels and a faster increment by one circuit based on AND-EXOR gate structures, has been proposed to improve the MAC architecture. Finally, the paper shows the post-synthesis power dissipation, area estimate, and the quality comparison of the image obtained from the RTL Simulation of the proposed architecture. |
| format | Article |
| id | doaj-art-01b9f42403b6418f872122496cf3f720 |
| institution | Kabale University |
| issn | 2169-3536 |
| language | English |
| publishDate | 2021-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-01b9f42403b6418f872122496cf3f7202025-01-30T00:01:02ZengIEEEIEEE Access2169-35362021-01-01913884913885710.1109/ACCESS.2021.31173359557274Development of Floating-Point MAC Engine for 2-D Convolution of ImageAjay Kumar Sahu0https://orcid.org/0000-0002-9991-0893Vishnumurthy Kedlaya K.1https://orcid.org/0000-0001-8266-1977Subramanya G. Nayak2https://orcid.org/0000-0001-7720-4392Department of Electronics and Communication Engineering, Manipal Academy of Higher Education, Manipal Institute of Technology, Manipal, IndiaDepartment of Electronics and Communication Engineering, Manipal Academy of Higher Education, Manipal Institute of Technology, Manipal, IndiaDepartment of Electronics and Communication Engineering, Manipal Academy of Higher Education, Manipal Institute of Technology, Manipal, IndiaIn the emerging trend of Graphics Processing Architecture, IEEE 754-2008 Floating point numbers are being widely used. Convolution is one of the standard operations in image processing applications, and because of its computationally intensive nature, an appropriate and efficient image processing architecture is of great need. This paper proposes a single-precision Floating Point MAC engine to accelerate the sliding window algorithm for the 2-D convolution of image. The engine uses a modified algorithm for virtual zero-padding that saves memory space, and it also provides configurable parameters to specify filter and image size. A low power multiplier with reduced dynamic power, specifically when operating on pixels and a faster increment by one circuit based on AND-EXOR gate structures, has been proposed to improve the MAC architecture. Finally, the paper shows the post-synthesis power dissipation, area estimate, and the quality comparison of the image obtained from the RTL Simulation of the proposed architecture.https://ieeexplore.ieee.org/document/9557274/2-D image convolutionlow-power multiplierincrement by oneconvolution accelerator |
| spellingShingle | Ajay Kumar Sahu Vishnumurthy Kedlaya K. Subramanya G. Nayak Development of Floating-Point MAC Engine for 2-D Convolution of Image IEEE Access 2-D image convolution low-power multiplier increment by one convolution accelerator |
| title | Development of Floating-Point MAC Engine for 2-D Convolution of Image |
| title_full | Development of Floating-Point MAC Engine for 2-D Convolution of Image |
| title_fullStr | Development of Floating-Point MAC Engine for 2-D Convolution of Image |
| title_full_unstemmed | Development of Floating-Point MAC Engine for 2-D Convolution of Image |
| title_short | Development of Floating-Point MAC Engine for 2-D Convolution of Image |
| title_sort | development of floating point mac engine for 2 d convolution of image |
| topic | 2-D image convolution low-power multiplier increment by one convolution accelerator |
| url | https://ieeexplore.ieee.org/document/9557274/ |
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