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  1. 1
    The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units

    The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units by Chi Wai Yu, Julien Lamoureux, Steven J. E. Wilton, Philip H. W. Leong, Wayne Luk

    Published 2008-01-01
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  2. 2
    Multiloop Parallelisation Using Unrolling and Fission

    Multiloop Parallelisation Using Unrolling and Fission by Yuet Ming Lam, José Gabriel F. Coutinho, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk

    Published 2010-01-01
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