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  1. 1
    A Dynamic Dual Fixed-Point Arithmetic Architecture for FPGAs

    A Dynamic Dual Fixed-Point Arithmetic Architecture for FPGAs by G. Alonzo Vera, Marios Pattichis, James Lyke

    Published 2011-01-01
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  2. 2
    Partial Reconfigurable FIR Filtering System Using Distributed Arithmetic

    Partial Reconfigurable FIR Filtering System Using Distributed Arithmetic by Daniel Llamocca, Marios Pattichis, G. Alonzo Vera

    Published 2010-01-01
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