Showing 1 - 8 results of 8 for search 'D. I. Cheremisinov', query time: 0.01s Refine Results
  1. 1
    PRALU language - the tool for verifying digital devices

    PRALU language - the tool for verifying digital devices by D. I. Cheremisinov

    Published 2018-12-01
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  2. 2
    TECHNOLOGY MAPPING TOOL FOR VLSI CAD

    TECHNOLOGY MAPPING TOOL FOR VLSI CAD by D. I. Cheremisinov

    Published 2017-03-01
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  3. 3
    Extraction of logical networks during decompiling transistor-level CMOS circuit descriptions

    Extraction of logical networks during decompiling transistor-level CMOS circuit descriptions by D. I. Cheremisinov, L. D. Cheremisinova

    Published 2024-09-01
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  4. 4
    POWER DRIVEN SYNTHESIS OF COMBINATIONAL CIRCUITS ON THE BASE OF CMOS VLSI LIBRARY ELEMENTS

    POWER DRIVEN SYNTHESIS OF COMBINATIONAL CIRCUITS ON THE BASE OF CMOS VLSI LIBRARY ELEMENTS by D. I. Cheremisinov, L. D. Cheremisinova

    Published 2016-10-01
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  5. 5
    Simulation of discrete control systems with parallelism of behavior

    Simulation of discrete control systems with parallelism of behavior by D. I. Cheremisinov, L. D. Cheremisinova

    Published 2023-12-01
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  6. 6
    Logical gates recognition in a flat transistor circuit

    Logical gates recognition in a flat transistor circuit by D. I. Cheremisinov, L. D. Cheremisinova

    Published 2021-12-01
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  7. 7
    Redesigning CMOS VLSI using Yosys synthesis tool

    Redesigning CMOS VLSI using Yosys synthesis tool by D. I. Cheremisinov, L. D. Cheremisinova

    Published 2025-03-01
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  8. 8
    Canonization of graphs during transistor circuits decompilation

    Canonization of graphs during transistor circuits decompilation by D. I. Cheremisinov, L. D. Cheremisinova

    Published 2022-09-01
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